Index: sys/dev/sk/if_skreg.h
===================================================================
--- sys/dev/sk/if_skreg.h	(revision 224272)
+++ sys/dev/sk/if_skreg.h	(working copy)
@@ -118,6 +118,7 @@
  */
 #define DEVICEID_DLINK_DGE530T_A1	0x4c00
 #define DEVICEID_DLINK_DGE530T_B1	0x4b01
+#define DEVICEID_DLINK_DGE530T_C1	0x4302
 
 /*
  * GEnesis registers. The GEnesis chip has a 256-byte I/O window
@@ -1273,18 +1274,18 @@
 #define SK_PME_STATUS		0x8000
 
 #define CSR_WRITE_4(sc, reg, val)	\
-	bus_write_4((sc)->sk_res[0], (reg), (val))
+	bus_write_4((sc)->sk_res, (reg), (val))
 #define CSR_WRITE_2(sc, reg, val)	\
-	bus_write_2((sc)->sk_res[0], (reg), (val))
+	bus_write_2((sc)->sk_res, (reg), (val))
 #define CSR_WRITE_1(sc, reg, val)	\
-	bus_write_1((sc)->sk_res[0], (reg), (val))
+	bus_write_1((sc)->sk_res, (reg), (val))
 
 #define CSR_READ_4(sc, reg)		\
-	bus_read_4((sc)->sk_res[0], (reg))
+	bus_read_4((sc)->sk_res, (reg))
 #define CSR_READ_2(sc, reg)		\
-	bus_read_2((sc)->sk_res[0], (reg))
+	bus_read_2((sc)->sk_res, (reg))
 #define CSR_READ_1(sc, reg)		\
-	bus_read_1((sc)->sk_res[0], (reg))
+	bus_read_1((sc)->sk_res, (reg))
 
 struct sk_type {
 	u_int16_t		sk_vid;
@@ -1438,8 +1439,10 @@
 
 /* Softc for the GEnesis controller. */
 struct sk_softc {
-	struct resource		*sk_res[2];	/* I/O and IRQ resources */
-	struct resource_spec	*sk_res_spec;
+	struct resource		*sk_res;
+	int			sk_res_id;
+	int			sk_res_type;
+	struct resource		*sk_irq;
 	void			*sk_intrhand;	/* irq handler handle */
 	device_t		sk_dev;
 	u_int8_t		sk_type;
Index: sys/dev/sk/if_sk.c
===================================================================
--- sys/dev/sk/if_sk.c	(revision 224272)
+++ sys/dev/sk/if_sk.c	(working copy)
@@ -123,10 +123,6 @@
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
 
-#if 0
-#define SK_USEIOSPACE
-#endif
-
 #include <dev/sk/if_skreg.h>
 #include <dev/sk/xmaciireg.h>
 #include <dev/sk/yukonreg.h>
@@ -184,6 +180,11 @@
 		DEVICEID_DLINK_DGE530T_B1,
 		"D-Link DGE-530T Gigabit Ethernet"
 	},
+	{
+		VENDORID_DLINK,
+		DEVICEID_DLINK_DGE530T_C1,
+		"D-Link DGE-530T Gigabit Ethernet"
+	},
 	{ 0, 0, NULL }
 };
 
@@ -342,18 +343,6 @@
 DRIVER_MODULE(sk, skc, sk_driver, sk_devclass, 0, 0);
 DRIVER_MODULE(miibus, sk, miibus_driver, miibus_devclass, 0, 0);
 
-static struct resource_spec sk_res_spec_io[] = {
-	{ SYS_RES_IOPORT,	PCIR_BAR(1),	RF_ACTIVE },
-	{ SYS_RES_IRQ,		0,		RF_ACTIVE | RF_SHAREABLE },
-	{ -1,			0,		0 }
-};
-
-static struct resource_spec sk_res_spec_mem[] = {
-	{ SYS_RES_MEMORY,	PCIR_BAR(0),	RF_ACTIVE },
-	{ SYS_RES_IRQ,		0,		RF_ACTIVE | RF_SHAREABLE },
-	{ -1,			0,		0 }
-};
-
 #define SK_SETBIT(sc, reg, x)		\
 	CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | x)
 
@@ -377,12 +366,12 @@
 	struct sk_softc		*sc;
 	int			reg;
 {
-#ifdef SK_USEIOSPACE
-	CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
-	return(CSR_READ_4(sc, SK_WIN_BASE + SK_REG(reg)));
-#else
-	return(CSR_READ_4(sc, reg));
-#endif
+
+	if (sc->sk_res_type == SYS_RES_IOPORT) {
+		CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
+		return(CSR_READ_4(sc, SK_WIN_BASE + SK_REG(reg)));
+	} else
+		return(CSR_READ_4(sc, reg));
 }
 
 static u_int16_t
@@ -390,12 +379,12 @@
 	struct sk_softc		*sc;
 	int			reg;
 {
-#ifdef SK_USEIOSPACE
-	CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
-	return(CSR_READ_2(sc, SK_WIN_BASE + SK_REG(reg)));
-#else
-	return(CSR_READ_2(sc, reg));
-#endif
+
+	if (sc->sk_res_type == SYS_RES_IOPORT) {
+		CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
+		return(CSR_READ_2(sc, SK_WIN_BASE + SK_REG(reg)));
+	} else
+		return(CSR_READ_2(sc, reg));
 }
 
 static u_int8_t
@@ -403,12 +392,12 @@
 	struct sk_softc		*sc;
 	int			reg;
 {
-#ifdef SK_USEIOSPACE
-	CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
-	return(CSR_READ_1(sc, SK_WIN_BASE + SK_REG(reg)));
-#else
-	return(CSR_READ_1(sc, reg));
-#endif
+
+	if (sc->sk_res_type == SYS_RES_IOPORT) {
+		CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
+		return(CSR_READ_1(sc, SK_WIN_BASE + SK_REG(reg)));
+	} else
+		return(CSR_READ_1(sc, reg));
 }
 
 static void
@@ -417,13 +406,12 @@
 	int			reg;
 	u_int32_t		val;
 {
-#ifdef SK_USEIOSPACE
-	CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
-	CSR_WRITE_4(sc, SK_WIN_BASE + SK_REG(reg), val);
-#else
-	CSR_WRITE_4(sc, reg, val);
-#endif
-	return;
+
+	if (sc->sk_res_type == SYS_RES_IOPORT) {
+		CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
+		CSR_WRITE_4(sc, SK_WIN_BASE + SK_REG(reg), val);
+	} else
+		CSR_WRITE_4(sc, reg, val);
 }
 
 static void
@@ -432,13 +420,12 @@
 	int			reg;
 	u_int32_t		val;
 {
-#ifdef SK_USEIOSPACE
-	CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
-	CSR_WRITE_2(sc, SK_WIN_BASE + SK_REG(reg), val);
-#else
-	CSR_WRITE_2(sc, reg, val);
-#endif
-	return;
+
+	if (sc->sk_res_type == SYS_RES_IOPORT) {
+		CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
+		CSR_WRITE_2(sc, SK_WIN_BASE + SK_REG(reg), val);
+	} else
+		CSR_WRITE_2(sc, reg, val);
 }
 
 static void
@@ -447,13 +434,12 @@
 	int			reg;
 	u_int32_t		val;
 {
-#ifdef SK_USEIOSPACE
-	CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
-	CSR_WRITE_1(sc, SK_WIN_BASE + SK_REG(reg), val);
-#else
-	CSR_WRITE_1(sc, reg, val);
-#endif
-	return;
+
+	if (sc->sk_res_type == SYS_RES_IOPORT) {
+		CSR_WRITE_4(sc, SK_RAP, SK_WIN(reg));
+		CSR_WRITE_1(sc, SK_WIN_BASE + SK_REG(reg), val);
+	} else
+		CSR_WRITE_1(sc, reg, val);
 }
 
 static int
@@ -1554,7 +1540,7 @@
 	device_t		dev;
 {
 	struct sk_softc		*sc;
-	int			error = 0, *port;
+	int			error = 0, *port, rid;
 	uint8_t			skrs;
 	const char		*pname = NULL;
 	char			*revstr;
@@ -1570,23 +1556,28 @@
 	 */
 	pci_enable_busmaster(dev);
 
-	/* Allocate resources */
-#ifdef SK_USEIOSPACE
-	sc->sk_res_spec = sk_res_spec_io;
-#else
-	sc->sk_res_spec = sk_res_spec_mem;
-#endif
-	error = bus_alloc_resources(dev, sc->sk_res_spec, sc->sk_res);
-	if (error) {
-		if (sc->sk_res_spec == sk_res_spec_mem)
-			sc->sk_res_spec = sk_res_spec_io;
+	/* Prefer memory mapping over IO space. */
+	sc->sk_res_type = SYS_RES_MEMORY;
+	/* DGE-530T Rev. C1 uses different BAR. */
+	if (pci_get_vendor(dev) == VENDORID_DLINK &&
+	    pci_get_device(dev) == DEVICEID_DLINK_DGE530T_C1)
+		sc->sk_res_id = PCIR_BAR(1);
+	else
+		sc->sk_res_id = PCIR_BAR(0);
+	sc->sk_res = bus_alloc_resource_any(dev, sc->sk_res_type,
+	    &sc->sk_res_id, RF_ACTIVE);
+	if (sc->sk_res == NULL) {
+		sc->sk_res_type = SYS_RES_IOPORT;
+		if (pci_get_vendor(dev) == VENDORID_DLINK &&
+		    pci_get_device(dev) == DEVICEID_DLINK_DGE530T_C1)
+			sc->sk_res_id = PCIR_BAR(0);
 		else
-			sc->sk_res_spec = sk_res_spec_mem;
-		error = bus_alloc_resources(dev, sc->sk_res_spec, sc->sk_res);
-		if (error) {
-			device_printf(dev, "couldn't allocate %s resources\n",
-			    sc->sk_res_spec == sk_res_spec_mem ? "memory" :
-			    "I/O");
+			sc->sk_res_id = PCIR_BAR(1);
+		sc->sk_res = bus_alloc_resource_any(dev, sc->sk_res_type,
+		    &sc->sk_res_id, RF_ACTIVE);
+		if (sc->sk_res == NULL) {
+			device_printf(dev, "couldn't map memory/ IO ports\n");
+			error = ENXIO;
 			goto fail;
 		}
 	}
@@ -1674,6 +1665,7 @@
 	case DEVICEID_LINKSYS_EG1032:
 	case DEVICEID_DLINK_DGE530T_A1:
 	case DEVICEID_DLINK_DGE530T_B1:
+	case DEVICEID_DLINK_DGE530T_C1:
 		/* Stay with VPD PN. */
 		(void) pci_get_vpd_ident(dev, &pname);
 		break;
@@ -1801,8 +1793,17 @@
 		goto fail;
 	}
 
+	/* Allocate interrupt. */
+	rid = 0;
+	sc->sk_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
+	    RF_SHAREABLE | RF_ACTIVE);
+	if (sc->sk_irq == NULL) {
+		device_printf(dev, "couldn't map interrupt\n");
+		error = ENXIO;
+		goto fail;
+	}
 	/* Hook interrupt last to avoid having to lock softc */
-	error = bus_setup_intr(dev, sc->sk_res[1], INTR_TYPE_NET|INTR_MPSAFE,
+	error = bus_setup_intr(dev, sc->sk_irq, INTR_TYPE_NET|INTR_MPSAFE,
 	    NULL, sk_intr, sc, &sc->sk_intrhand);
 
 	if (error) {
@@ -1888,8 +1889,12 @@
 	}
 
 	if (sc->sk_intrhand)
-		bus_teardown_intr(dev, sc->sk_res[1], sc->sk_intrhand);
-	bus_release_resources(dev, sc->sk_res_spec, sc->sk_res);
+		bus_teardown_intr(dev, sc->sk_irq, sc->sk_intrhand);
+	if (sc->sk_irq)
+		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sk_irq);
+	if (sc->sk_res)
+		bus_release_resource(dev, sc->sk_res_type, sc->sk_res_id,
+		    sc->sk_res);
 
 	mtx_destroy(&sc->sk_mii_mtx);
 	mtx_destroy(&sc->sk_mtx);