--- simulavr-1.0.0/examples/python/ex_pinout.c.orig	2012-02-12 07:26:38.000000000 -0800
+++ simulavr-1.0.0/examples/python/ex_pinout.c	2015-11-28 15:38:18.069427000 -0800
@@ -3,7 +3,7 @@
 
 volatile int timer2_ticks;
 
-ISR(SIG_OUTPUT_COMPARE2) {
+ISR(TIMER2_COMP_vect) {
    timer2_ticks++;
 }