/*- * Copyright (c) 1991 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the University of * California, Berkeley and its contributors. * 4. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD: /ctm/FreeBSD/anoncvs/cvs/src/sys/isa/sio.c,v 1.328 2001/03/07 14:27:56 sanpei Exp $ * from: @(#)com.c 7.5 (Berkeley) 5/16/91 * from: i386/isa sio.c,v 1.234 */ /* * Serial driver, based on 386BSD-0.1 com driver. * Mostly rewritten to use pseudo-DMA. * Works for National Semiconductor NS8250-NS16550AF UARTs. * COM driver, based on HP dca driver. * * Changes for PC-Card integration: * - Added PC-Card driver table and handlers */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ #define CALLOUT_MASK 0x80 #define CONTROL_MASK 0x60 #define CONTROL_INIT_STATE 0x20 #define CONTROL_LOCK_STATE 0x40 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) #define MINOR_MAGIC_MASK (CALLOUT_MASK | CONTROL_MASK) #define MINOR_TO_UNIT(mynor) ((mynor) & ~MINOR_MAGIC_MASK) #define COM_NOFIFO(flags) ((flags) & 0x02) #define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) /* UART (16550A) register */ #define UART_DATA 0 /* data register (R/W) */ #define UART_DLBL 0 /* divisor latch low (W) */ #define UART_DLBH 1 /* divisor latch high (W) */ #define UART_IER 1 /* interrupt enable (W) */ #define UART_IIR 2 /* interrupt identification (R) */ #define UART_FIFO 2 /* FIFO control (W) */ #define UART_LCTL 3 /* line control register (R/W) */ #define UART_CFCR 3 /* line control register (R/W) */ #define UART_MCR 4 /* modem control register (R/W) */ #define UART_LSR 5 /* line status register (R/W) */ #define UART_MSR 6 /* modem status register (R/W) */ /* * com state bits. * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher * than the other bits so that they can be tested as a group without masking * off the low bits. * * The following com and tty flags correspond closely: * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and * comstop()) * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) * TS_FLUSH is not used. * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). */ #define CS_BUSY 0x80 /* output in progress */ #define CS_TTGO 0x40 /* output not stopped by XOFF */ #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ #define CS_CHECKMSR 1 /* check of MSR scheduled */ #define CS_CTS_OFLOW 2 /* use CTS output flow control */ #define CS_DTR_OFF 0x10 /* DTR held off */ #define CS_ODONE 4 /* output completed */ #define CS_RTS_IFLOW 8 /* use RTS input flow control */ #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ static char const * const error_desc[] = { #define CE_OVERRUN 0 "silo overflow", #define CE_INTERRUPT_BUF_OVERFLOW 1 "interrupt-level buffer overflow", #define CE_TTY_BUF_OVERFLOW 2 "tty-level buffer overflow", }; #define CE_NTYPES 3 #define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) /* types. XXX - should be elsewhere */ typedef u_char bool_t; /* boolean */ /* queue of linear buffers */ struct lbq { u_char *l_head; /* next char to process */ u_char *l_tail; /* one past the last char to process */ struct lbq *l_next; /* next in queue */ bool_t l_queued; /* nonzero if queued */ }; /* com device structure */ struct com_s { u_int flags; /* Copy isa device flags */ u_char state; /* miscellaneous flag bits */ bool_t active_out; /* nonzero if the callout device is open */ u_char cfcr_image; /* copy of value written to CFCR */ u_char extra_state; /* more flag bits, separate for order trick */ u_char fifo_image; /* copy of value written to FIFO */ bool_t hasfifo; /* nonzero for 16550 UARTs */ u_char mcr_image; /* copy of value written to MCR */ bool_t gone; /* hardware disappeared */ int unit; /* unit number */ int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ u_int tx_fifo_size; u_int wopeners; /* # processes waiting for DCD in open() */ /* * The high level of the driver never reads status registers directly * because there would be too many side effects to handle conveniently. * Instead, it reads copies of the registers stored here by the * interrupt handler. */ u_char last_modem_status; /* last MSR read by intr handler */ u_char prev_modem_status; /* last MSR handled by high level */ u_char hotchar; /* ldisc-specific char to be handled ASAP */ u_char *ibuf; /* start of input buffer */ u_char *ibufend; /* end of input buffer */ u_char *ibufold; /* old input buffer, to be freed */ u_char *ihighwater; /* threshold in input buffer */ u_char *iptr; /* next free spot in input buffer */ int ibufsize; /* size of ibuf (not include error bytes) */ int ierroff; /* offset of error bytes in ibuf */ struct lbq obufq; /* head of queue of output buffers */ struct lbq obufs[2]; /* output buffers */ struct tty *tp; /* cross reference */ /* Initial state. */ struct termios it_in; /* should be in struct tty */ struct termios it_out; /* Lock state. */ struct termios lt_in; /* should be in struct tty */ struct termios lt_out; bool_t do_timestamp; bool_t do_dcd_timestamp; struct timeval timestamp; struct timeval dcd_timestamp; struct pps_state pps; u_long bytes_in; /* statistics */ u_long bytes_out; u_int delta_error_counts[CE_NTYPES]; u_long error_counts[CE_NTYPES]; struct resource *irqres; struct resource *ioportres1; struct resource *ioportres2; void *cookie; dev_t devs[6]; /* * Data area for output buffers. Someday we should build the output * buffer queue without copying data. */ u_char obuf1[256]; u_char obuf2[256]; }; static timeout_t siobusycheck; static timeout_t siodtrwakeup; static void comhardclose __P((struct com_s *com)); static void sioinput __P((struct com_s *com)); static void siointr1 __P((struct com_s *com)); static void siointr __P((void *arg)); static int commctl __P((struct com_s *com, int bits, int how)); static int comparam __P((struct tty *tp, struct termios *t)); static void siopoll __P((void *)); static void siosettimeout __P((void)); static int siosetwater __P((struct com_s *com, speed_t speed)); static void comstart __P((struct tty *tp)); static void comstop __P((struct tty *tp, int rw)); static timeout_t comwakeup; static void disc_optim __P((struct tty *tp, struct termios *t, struct com_s *com)); static int ltmdm_pci_probe __P((device_t dev)); static int ltmdm_pci_attach __P((device_t dev)); static int ltmdm_pci_detach __P((device_t dev)); static int ltmdm_pci_shutdown __P((device_t dev)); static char driver_name[] = "ltmdm"; static struct mtx sio_lock; static int sio_inited; extern devclass_t sio_devclass; /* table and macro for fast conversion from a unit number to its com struct */ static devclass_t ltmdm_devclass; #define com_addr(unit) ((struct com_s *) \ devclass_get_softc(ltmdm_devclass, unit)) static device_method_t ltmdm_pci_methods[] = { /* Device interface */ DEVMETHOD(device_probe, ltmdm_pci_probe), DEVMETHOD(device_attach, ltmdm_pci_attach), DEVMETHOD(device_detach, ltmdm_pci_detach), { 0, 0 } }; static driver_t ltmdm_pci_driver = { driver_name, ltmdm_pci_methods, sizeof(struct com_s), }; static d_open_t sioopen; static d_close_t sioclose; static d_read_t sioread; static d_write_t siowrite; static d_ioctl_t sioioctl; #define CDEV_MAJOR 200 static struct cdevsw sio_cdevsw = { /* open */ sioopen, /* close */ sioclose, /* read */ sioread, /* write */ siowrite, /* ioctl */ sioioctl, /* poll */ ttypoll, /* mmap */ nommap, /* strategy */ nostrategy, /* name */ driver_name, /* maj */ CDEV_MAJOR, /* dump */ nodump, /* psize */ nopsize, /* flags */ D_TTY | D_KQFILTER, /* bmaj */ -1, /* kqfilter */ ttykqfilter, }; static u_int com_events; /* input chars + weighted output completions */ static void *sio_slow_ih; static void *sio_fast_ih; static int sio_timeout; static int sio_timeouts_until_log; static struct callout_handle sio_timeout_handle = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); static int sio_numunits; static struct speedtab comspeedtab[] = { { 0, 0 }, { 50, COMBRD(50) }, { 75, COMBRD(75) }, { 110, COMBRD(110) }, { 134, COMBRD(134) }, { 150, COMBRD(150) }, { 200, COMBRD(200) }, { 300, COMBRD(300) }, { 600, COMBRD(600) }, { 1200, COMBRD(1200) }, { 1800, COMBRD(1800) }, { 2400, COMBRD(2400) }, { 4800, COMBRD(4800) }, { 9600, COMBRD(9600) }, { 19200, COMBRD(19200) }, { 38400, COMBRD(38400) }, { 57600, COMBRD(57600) }, { 115200, COMBRD(115200) }, { -1, -1 } }; /****************************************************************************/ #include "bus_if.h" #define LTMDM_PCI_BASE_ADDR0 0x10 #define LTMDM_PCI_BASE_ADDR1 0x14 #define LTMDM_PCI_BASE_ADDR2 0x18 extern u_int32_t lucent_detect_modem(void); extern void lucent_init_modem(void); extern void V16550_Init(void); extern u_int8_t read_vuart_port(u_int8_t); extern void write_vuart_port(u_int8_t, u_int8_t); extern void vxdPortOpen(void); extern void vxdPortClose(void); extern void dp_dsp_isr(void); extern u_int8_t Irq; extern u_int16_t BaseAddress; extern u_int16_t BaseAddress2; extern u_int16_t BaseAddressData; extern u_int16_t BaseAddressIndex; extern u_int8_t BaseValue; extern u_int8_t V16550_IRQ_Number; extern u_int16_t ComAddress; extern u_int8_t ToshibaFlag; extern u_int8_t CpqFlag; void rs_interrupt_single(int irq, void *dev_id, void * regs); void lt_init_timer(void); void lt_add_timer(void (*timerfunction)(unsigned long)); void lt_pcibios_read_config_byte(u_int8_t bus, u_int8_t devfn, u_int8_t reg, u_int8_t *result); void lt_pcibios_read_config_word(u_int8_t bus, u_int8_t devfn, u_int8_t reg, u_int16_t *result); void lt_pcibios_read_config_dword(u_int8_t bus, u_int8_t devfn, u_int8_t reg, u_int32_t *result); int lt_pci_present(void); int lt_pci_find_device(unsigned int vendor, unsigned int device); u_int8_t Get_PCI_INTERRUPT_LINE(void); u_int8_t Get_PCI_BASE_ADDRESS_1(void); u_int8_t Get_PCI_BASE_ADDRESS_2(void); u_int32_t Get_PCI_BASE_ADDRESS_IO_MASK(void); u_int8_t Get_PCI_BASE_ADDRESS_SPACE_IO(void); u_int8_t GetIrqFromDev(void); u_int8_t GetBusNumberFromDev(void); u_int8_t GetDevfnFromDev(void); u_int16_t GetDeviceFromDev(void); u_int16_t GetVendorFromDev(void); u_int32_t GetBase_addressFromDev(int num); u_int32_t VMODEM_Get_System_Time(void); u_int8_t inp(u_int16_t addr); void outp(u_int16_t addr, u_int8_t value); u_int16_t inpw(u_int16_t addr); void outpw(u_int16_t addr, u_int16_t value); u_int32_t inpd(u_int16_t addr); void outpd(u_int16_t addr, u_int32_t value); static device_t lt_dev = NULL; static int enable_dbg_msg = 1; #define d_printf if(enable_dbg_msg)printf void rs_interrupt_single(int irq, void *dev_id, void *regs) { /* called from timertick_function@ltmdmobj.o push $0 push $0 movzbl Irq, %eax push %eax call rs_interrupt_single */ struct com_s *com; int unit; unit = 0; com = com_addr(unit); if (com != NULL) siointr1(com); } void lt_init_timer(void) { /* called from lucent_init_modem@ltmdmobj.o movb $0, VMODEM_Timer_Active call lt_init_timer */ ; } void lt_add_timer(void (*timerfunction)(unsigned long)) { /* called from timertick_function@ltmdmobj.o push timertick_function call lt_add_timer */ timeout((void(*)(void *))timerfunction, NULL, 1); } void lt_pcibios_read_config_byte(u_int8_t bus, u_int8_t devfn, u_int8_t reg, u_int8_t *result) { *result = pci_cfgregread(bus,(devfn >> 3) & 0x1f, devfn & 0x07, reg, 1); } void lt_pcibios_read_config_word(u_int8_t bus, u_int8_t devfn, u_int8_t reg, u_int16_t *result) { *result = pci_cfgregread(bus,(devfn >> 3) & 0x1f, devfn & 0x07, reg, 2); } void lt_pcibios_read_config_dword(u_int8_t bus, u_int8_t devfn, u_int8_t reg, u_int32_t *result) { *result = pci_cfgregread(bus,(devfn >> 3) & 0x1f, devfn & 0x07, reg, 4); } int lt_pci_present(void) { d_printf(" lt_pci_present()\n"); d_printf(" return value = 1\n"); return 1; } int lt_pci_find_device(unsigned int vendor, unsigned int device) { #if 0 devclass_t pci; device_t bus; device_t *child; int numchild, unit, maxunit, i; d_printf(" lt_pci_find_device()\n"); d_printf(" dev = 0x%08x\n", (unsigned int)lt_dev); d_printf(" vendor = 0x%08x\n", vendor); d_printf(" device = 0x%08x\n", device); lt_dev = NULL; pci = devclass_find("pci"); d_printf(" pci = 0x%08x\n", pci); maxunit = devclass_get_maxunit(pci); d_printf(" maxunit = %d\n", maxunit); for (unit = 0; unit < maxunit; unit++) { bus = devclass_get_device(pci, unit); d_printf(" unit = %d, bus = 0x%08x\n", unit, bus); if (bus != NULL) { device_get_children(bus, &child, &numchild); d_printf(" numchild = %d, child = 0x%08x\n", numchild, child); for (i = 0; i < numchild; i++) { d_printf(" i = %d\n", i); d_printf(" pci_get_vendor(child[i]) = %d\n", pci_get_vendor(child[i])); d_printf(" pci_get_device(child[i]) = %d\n", pci_get_device(child[i])); if (pci_get_vendor(child[i]) == vendor && pci_get_device(child[i]) == device) { d_printf(" dev = 0x%08x\n", child[i]); lt_dev = child[i]; free(child, M_TEMP); return 0; } } free(child, M_TEMP); } } return 1; #else int ret; d_printf(" lt_pci_find_device()\n"); d_printf(" dev = 0x%08x\n", (unsigned int)lt_dev); d_printf(" vendor = 0x%08x\n", vendor); d_printf(" device = 0x%08x\n", device); if (pci_get_vendor(lt_dev) == vendor && pci_get_device(lt_dev) == device) ret = 1; else ret = 0; d_printf(" ret = %d\n", ret); return ret; #endif } u_int8_t Get_PCI_INTERRUPT_LINE(void) { d_printf(" Get_PCI_INTERRUPT_LINE()\n"); d_printf(" PCI_INTERRUPT_LINE = 0x3c\n"); return 0x3c; } u_int8_t Get_PCI_BASE_ADDRESS_1(void) { d_printf(" Get_PCI_BASE_ADDRESS_1()\n"); d_printf(" PCI_BASE_ADDRESS_1 = 0x14\n"); return 0x14; } u_int8_t Get_PCI_BASE_ADDRESS_2(void) { d_printf(" Get_PCI_BASE_ADDRESS_2()\n"); d_printf(" PCI_BASE_ADDRESS_2 = 0x18\n"); return 0x18; } u_int32_t Get_PCI_BASE_ADDRESS_IO_MASK(void) { d_printf(" Get_PCI_BASE_ADDRESS_IO_MASK()\n"); d_printf(" PCI_BASE_ADDRESS_IO_MASK = 0xfffffffc\n"); return 0xfffffffcUL; } u_int8_t Get_PCI_BASE_ADDRESS_SPACE_IO(void) { d_printf(" Get_PCI_BASE_ADDRESS_SPACE_IO()\n"); d_printf(" PCI_BASE_ADDRESS_SPACE_IO = 0x01\n"); return 0x01; } u_int8_t GetIrqFromDev(void) { u_int8_t irq; irq = pci_get_irq(lt_dev); d_printf(" GetIrqFromDev()\n"); d_printf(" dev = 0x%08x\n", (unsigned int)lt_dev); d_printf(" irq = 0x%02x\n", irq); return irq; } u_int8_t GetBusNumberFromDev(void) { u_int8_t bus_number; bus_number = pci_get_bus(lt_dev); d_printf(" GetBusNumberFromDev()\n"); d_printf(" dev = 0x%08x\n", (unsigned int)lt_dev); d_printf(" bus number = 0x%02x\n", bus_number); return bus_number; } u_int8_t GetDevfnFromDev(void) { u_int8_t slot, func, devfn; slot = pci_get_slot(lt_dev); func = pci_get_function(lt_dev); devfn = ((slot & 0x1f) << 3) | (func & 0x07); d_printf(" GetDevfnFromDev()\n"); d_printf(" dev = 0x%08x\n", (unsigned int)lt_dev); d_printf(" devfn = 0x%02x\n", devfn); return devfn; } u_int16_t GetDeviceFromDev(void) { u_int16_t device; device = pci_get_device(lt_dev); d_printf(" GetDeviceFromDev()\n"); d_printf(" dev = 0x%08x\n", (unsigned int)lt_dev); d_printf(" device = 0x%04x\n", device); return device; } u_int16_t GetVendorFromDev(void) { u_int16_t vendor; vendor = pci_get_vendor(lt_dev); d_printf(" GetVendorFromDev()\n"); d_printf(" dev = 0x%08x\n", (unsigned int)lt_dev); d_printf(" vendor = 0x%04x\n", vendor); return vendor; } u_int32_t GetBase_addressFromDev(int num) { u_int32_t base_address; base_address = pci_read_config(lt_dev, LTMDM_PCI_BASE_ADDR0 + 4 * num, 4); d_printf(" GetBase_addressFromDev()\n"); d_printf(" dev = 0x%08x\n", (unsigned int)lt_dev); d_printf(" base address = 0x%08x\n", base_address); return base_address; } u_int32_t VMODEM_Get_System_Time(void) { struct timeval tv; unsigned long t; microtime(&tv); t = tv.tv_usec/1000 + tv.tv_sec*1000; return t; } u_int8_t inp(u_int16_t addr) { return inb(addr); } void outp(u_int16_t addr, u_int8_t value) { outb(addr, value); } u_int16_t inpw(u_int16_t addr) { return inw(addr); } void outpw(u_int16_t addr, u_int16_t value) { return outw(addr, value); } u_int32_t inpd(u_int16_t addr) { return inl(addr); } void outpd(u_int16_t addr, u_int32_t value) { return outl(addr, value); } /****************************************************************************/ struct pci_ids { int vendor; int device_bgn; int device_end; const char *description; }; static struct pci_ids pci_ids[] = { { 0x115d, 0x0000, 0x000f, "Xircom Win Modem" }, { 0x115d, 0x0440, 0x045c, "Xircom Win Modem" }, { 0x11c1, 0x0440, 0x045c, "Lucent Win Modem" }, { 0x00000000, NULL } }; static int ltmdm_pci_probe(device_t dev) { char *desc = NULL; int vendor; int device; int ret; struct pci_ids *id; lt_dev = dev; vendor = pci_get_vendor(dev); device = pci_get_device(dev); for (id = pci_ids; id->vendor != 0; id++) { if (id->vendor == vendor && id->device_bgn <= device && id->device_end >= device){ desc = id->description; break; } } if((desc == NULL)|| (id->vendor == 0)) { lt_dev = NULL; return ENXIO; } lt_dev = dev; if (atomic_cmpset_int(&sio_inited, 0, 1)) mtx_init(&sio_lock, driver_name, MTX_SPIN); d_printf(" lucent_detect_modem()\n"); ret = lucent_detect_modem(); if (ret) { lt_dev = NULL; return ENXIO; } if (sio_numunits >= 1) { lt_dev = NULL; return ENXIO; } device_set_desc(dev, desc); return 0; } static int ltmdm_pci_attach(device_t dev) { struct com_s *com; u_int flags; int unit, rid, ret; if (dev != lt_dev) { lt_dev = NULL; return ENXIO; } unit = device_get_unit(dev); com = device_get_softc(dev); flags = device_get_flags(dev); if (unit >= sio_numunits) sio_numunits = unit + 1; /* * sioprobe() has initialized the device registers as follows: * o cfcr = CFCR_8BITS. * It is most important that CFCR_DLAB is off, so that the * data port is not hidden when we enable interrupts. * o ier = 0. * Interrupts are only enabled when the line is open. * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible * interrupt control register or the config specifies no irq. * Keeping MCR_DTR and MCR_RTS off might stop the external * device from sending before we are ready. */ bzero(com, sizeof *com); com->unit = unit; com->cfcr_image = CFCR_8BITS; com->dtr_wait = 3 * hz; com->tx_fifo_size = 1; com->obufs[0].l_head = com->obuf1; com->obufs[1].l_head = com->obuf2; rid = LTMDM_PCI_BASE_ADDR1; com->ioportres1 = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE); if (com->ioportres1 == NULL) { device_printf(dev, "could not map ioport1\n"); return ENXIO; } rid = LTMDM_PCI_BASE_ADDR2; com->ioportres2 = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE); if (com->ioportres2 == NULL) { device_printf(dev, "could not map ioport2\n"); goto error0; return ENXIO; } rid = 0; com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, RF_ACTIVE|RF_SHAREABLE); if (com->irqres == NULL) { device_printf(dev, "could not map interrupt\n"); goto error1; } ret = bus_setup_intr(dev, com->irqres, INTR_TYPE_TTY /* |INTR_FAST*/, siointr, com, &com->cookie); if (ret != 0) { device_printf(dev, "could not activate interrupt\n"); goto error2; return ENXIO; } d_printf(" lucent_init_modem()\n"); lucent_init_modem(); d_printf(" vxdPortOpen()\n"); vxdPortOpen(); d_printf(" BaseValue = 0x%02x\n", BaseValue); d_printf(" BaseAddress = 0x%04x\n", BaseAddress); d_printf(" BaseAddress2 = 0x%04x\n", BaseAddress2); d_printf(" BaseAddressIndex = 0x%04x\n", BaseAddressIndex); d_printf(" BaseAddressData = 0x%04x\n", BaseAddressData); d_printf(" ComAddress = 0x%04x\n", ComAddress); d_printf(" V16550_IRQ_Number = %d\n", V16550_IRQ_Number); d_printf(" Irq = %d\n", Irq); d_printf(" ToshibaFlag = %d\n", ToshibaFlag); d_printf(" CpqFlag = %d\n", CpqFlag); /* * We don't use all the flags from since they * are only relevant for logins. It's important to have echo off * initially so that the line doesn't start blathering before the * echo flag can be turned off. */ com->it_in.c_iflag = 0; com->it_in.c_oflag = 0; com->it_in.c_cflag = TTYDEF_CFLAG; com->it_in.c_lflag = 0; com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; if (siosetwater(com, com->it_in.c_ispeed) != 0) { mtx_unlock_spin(&sio_lock); /* * Leave i/o resources allocated if this is a `cn'-level * console, so that other devices can't snarf them. */ bus_release_resource(dev, SYS_RES_IOPORT, rid, com->ioportres1); } mtx_unlock_spin(&sio_lock); termioschars(&com->it_in); com->it_out = com->it_in; /* attempt to determine UART type */ #if 0 #if 0 printf("ltmdm%d: type", unit); write_vuart_port(UART_FIFO, FIFO_ENABLE | FIFO_RX_HIGH); DELAY(100); switch (read_vuart_port(UART_IIR) & IIR_FIFO_MASK) { case FIFO_RX_LOW: printf(" 16450"); break; case FIFO_RX_MEDL: printf(" 16450?"); break; case FIFO_RX_MEDH: printf(" 16550?"); break; case FIFO_RX_HIGH: if (COM_NOFIFO(flags)) { printf(" 16550A fifo disabled"); } else { com->hasfifo = TRUE; com->tx_fifo_size = COM_FIFOSIZE(flags); printf(" 16550A"); } break; } write_vuart_port(UART_FIFO, 0); printf("\n"); #else printf("ltmdm%d: type Virtual 16550A\n", unit); #endif #endif if (sio_fast_ih == NULL) { swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, &sio_fast_ih); swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, &sio_slow_ih); } com->devs[0] = make_dev(&sio_cdevsw, unit, UID_ROOT, GID_WHEEL, 0600, "ttyl%r", unit); com->devs[1] = make_dev(&sio_cdevsw, unit | CONTROL_INIT_STATE, UID_ROOT, GID_WHEEL, 0600, "ttyil%r", unit); com->devs[2] = make_dev(&sio_cdevsw, unit | CONTROL_LOCK_STATE, UID_ROOT, GID_WHEEL, 0600, "ttyll%r", unit); com->devs[3] = make_dev(&sio_cdevsw, unit | CALLOUT_MASK, UID_UUCP, GID_DIALER, 0660, "cual%r", unit); com->devs[4] = make_dev(&sio_cdevsw, unit | CALLOUT_MASK | CONTROL_INIT_STATE, UID_UUCP, GID_DIALER, 0660, "cuail%r", unit); com->devs[5] = make_dev(&sio_cdevsw, unit | CALLOUT_MASK | CONTROL_LOCK_STATE, UID_UUCP, GID_DIALER, 0660, "cuall%r", unit); com->flags = flags; com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; pps_init(&com->pps); com->mcr_image = read_vuart_port(UART_MCR); return 0; error2: bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); error1: bus_release_resource(dev, SYS_RES_IOPORT, LTMDM_PCI_BASE_ADDR1, com->ioportres1); error0: bus_release_resource(dev, SYS_RES_IOPORT, LTMDM_PCI_BASE_ADDR2, com->ioportres2); return ENXIO; } static int ltmdm_pci_detach(device_t dev) { #if 0 struct com_s *com; int s; #if 0 struct tty *tp; if (sio_registered) { unregister_swi(SWI_TTY, siopoll); sio_registered = FALSE; } com = device_get_softc(dev); tp = com->tp; s = spltty(); (*linesw[tp->t_line].l_close)(tp, FNONBLOCK); disc_optim(tp, &tp->t_termios, com); comstop(tp, FREAD | FWRITE); comhardclose(com); ttyclose(tp); siosettimeout(); splx(s); s = spltty(); if (com->ibuf != NULL) { free(com->ibuf, M_DEVBUF); com->ibuf = NULL; } bzero(tp, sizeof *tp); splx(s); #else if (sio_registered) { unregister_swi(SWI_TTY, siopoll); sio_registered = FALSE; } #endif s = spltty(); vxdPortClose(); com = device_get_softc(dev); bus_teardown_intr(dev, com->irqres, com->cookie); bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); bus_release_resource(dev, SYS_RES_IOPORT, LTMDM_PCI_BASE_ADDR1, com->ioportres1); bus_release_resource(dev, SYS_RES_IOPORT, LTMDM_PCI_BASE_ADDR2, com->ioportres2); splx(s); return 0; #else return EBUSY; #endif } static int ltmdm_pci_shutdown(device_t dev) { #if 0 struct com_s *com; struct tty *tp; int s; com = device_get_softc(dev); tp = com->tp; s = spltty(); (*linesw[tp->t_line].l_close)(tp, FNONBLOCK); disc_optim(tp, &tp->t_termios, com); comstop(tp, FREAD | FWRITE); comhardclose(com); ttyclose(tp); siosettimeout(); splx(s); s = spltty(); if (com->ibuf != NULL) { free(com->ibuf, M_DEVBUF); com->ibuf = NULL; } bzero(tp, sizeof *tp); splx(s); return 0; #else return EBUSY; #endif } static int sioopen(dev, flag, mode, p) dev_t dev; int flag; int mode; struct proc *p; { struct com_s *com; int error; int mynor; int s; struct tty *tp; int unit; mynor = minor(dev); unit = MINOR_TO_UNIT(mynor); com = com_addr(unit); if (com == NULL) return (ENXIO); if (com->gone) return (ENXIO); if (mynor & CONTROL_MASK) return (0); tp = dev->si_tty = com->tp = ttymalloc(com->tp); s = spltty(); /* * We jump to this label after all non-interrupted sleeps to pick * up any changes of the device state. */ open_top: while (com->state & CS_DTR_OFF) { error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); if (com_addr(unit) == NULL) return (ENXIO); if (error != 0 || com->gone) goto out; } if (tp->t_state & TS_ISOPEN) { /* * The device is open, so everything has been initialized. * Handle conflicts. */ if (mynor & CALLOUT_MASK) { if (!com->active_out) { error = EBUSY; goto out; } } else { if (com->active_out) { if (flag & O_NONBLOCK) { error = EBUSY; goto out; } error = tsleep(&com->active_out, TTIPRI | PCATCH, "siobi", 0); if (com_addr(unit) == NULL) return (ENXIO); if (error != 0 || com->gone) goto out; goto open_top; } } if (tp->t_state & TS_XCLUDE && suser(p)) { error = EBUSY; goto out; } } else { /* * The device isn't open, so there are no conflicts. * Initialize it. Initialization is done twice in many * cases: to preempt sleeping callin opens if we are * callout, and to complete a callin open after DCD rises. */ tp->t_oproc = comstart; tp->t_param = comparam; tp->t_stop = comstop; tp->t_dev = dev; tp->t_termios = mynor & CALLOUT_MASK ? com->it_out : com->it_in; (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); ++com->wopeners; error = comparam(tp, &tp->t_termios); --com->wopeners; if (error != 0) goto out; /* * XXX we should goto open_top if comparam() slept. */ if (com->hasfifo) { /* * (Re)enable and drain fifos. * * Certain SMC chips cause problems if the fifos * are enabled while input is ready. Turn off the * fifo if necessary to clear the input. We test * the input ready bit after enabling the fifos * since we've already enabled them in comparam() * and to handle races between enabling and fresh * input. */ while (TRUE) { write_vuart_port(UART_FIFO, FIFO_RCV_RST | FIFO_XMT_RST | com->fifo_image); /* * XXX the delays are for superstitious * historical reasons. It must be less than * the character time at the maximum * supported speed (87 usec at 115200 bps * 8N1). Otherwise we might loop endlessly * if data is streaming in. We used to use * delays of 100. That usually worked * because DELAY(100) used to usually delay * for about 85 usec instead of 100. */ DELAY(50); if (!(read_vuart_port(UART_LSR) & LSR_RXRDY)) break; write_vuart_port(UART_FIFO, 0); DELAY(50); (void) read_vuart_port(UART_DATA); } } mtx_lock_spin(&sio_lock); (void) read_vuart_port(UART_LSR); (void) read_vuart_port(UART_DATA);; com->prev_modem_status = com->last_modem_status = read_vuart_port(UART_MSR); write_vuart_port(UART_IER, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC); mtx_unlock_spin(&sio_lock); /* * Handle initial DCD. Callout devices get a fake initial * DCD (trapdoor DCD). If we are callout, then any sleeping * callin opens get woken up and resume sleeping on "siobi" * instead of "siodcd". */ /* * XXX `mynor & CALLOUT_MASK' should be * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where * TRAPDOOR_CARRIER is the default initial state for callout * devices and SOFT_CARRIER is like CLOCAL except it hides * the true carrier. */ if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) (*linesw[tp->t_line].l_modem)(tp, 1); } /* * Wait for DCD if necessary. */ if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { ++com->wopeners; error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); if (com_addr(unit) == NULL) return (ENXIO); --com->wopeners; if (error != 0 || com->gone) goto out; goto open_top; } error = (*linesw[tp->t_line].l_open)(dev, tp); disc_optim(tp, &tp->t_termios, com); if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) com->active_out = TRUE; siosettimeout(); out: splx(s); if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) comhardclose(com); return (error); } static int sioclose(dev, flag, mode, p) dev_t dev; int flag; int mode; struct proc *p; { struct com_s *com; int mynor; int s; struct tty *tp; mynor = minor(dev); if (mynor & CONTROL_MASK) return (0); com = com_addr(MINOR_TO_UNIT(mynor)); if (com == NULL) return (ENODEV); tp = com->tp; s = spltty(); (*linesw[tp->t_line].l_close)(tp, flag); disc_optim(tp, &tp->t_termios, com); comstop(tp, FREAD | FWRITE); comhardclose(com); ttyclose(tp); siosettimeout(); splx(s); if (com->gone) { printf("sio%d: gone\n", com->unit); s = spltty(); if (com->ibuf != NULL) free(com->ibuf, M_DEVBUF); bzero(tp, sizeof *tp); splx(s); } return (0); } static void comhardclose(com) struct com_s *com; { int s; struct tty *tp; int unit; unit = com->unit; s = spltty(); com->do_timestamp = FALSE; com->do_dcd_timestamp = FALSE; com->pps.ppsparam.mode = 0; write_vuart_port(UART_CFCR, com->cfcr_image &= ~CFCR_SBREAK); { write_vuart_port(UART_IER, 0); tp = com->tp; if (tp->t_cflag & HUPCL /* * XXX we will miss any carrier drop between here and the * next open. Perhaps we should watch DCD even when the * port is closed; it is not sufficient to check it at * the next open because it might go up and down while * we're not watching. */ || (!com->active_out && !(com->prev_modem_status & MSR_DCD) && !(com->it_in.c_cflag & CLOCAL)) || !(tp->t_state & TS_ISOPEN)) { (void)commctl(com, TIOCM_DTR, DMBIC); if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { timeout(siodtrwakeup, com, com->dtr_wait); com->state |= CS_DTR_OFF; } } } if (com->hasfifo) { /* * Disable fifos so that they are off after controlled * reboots. Some BIOSes fail to detect 16550s when the * fifos are enabled. */ write_vuart_port(UART_FIFO, 0); } com->active_out = FALSE; wakeup(&com->active_out); wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ splx(s); } static int sioread(dev, uio, flag) dev_t dev; struct uio *uio; int flag; { int mynor; struct com_s *com; mynor = minor(dev); if (mynor & CONTROL_MASK) return (ENODEV); com = com_addr(MINOR_TO_UNIT(mynor)); if (com == NULL || com->gone) return (ENODEV); return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); } static int siowrite(dev, uio, flag) dev_t dev; struct uio *uio; int flag; { int mynor; struct com_s *com; int unit; mynor = minor(dev); if (mynor & CONTROL_MASK) return (ENODEV); unit = MINOR_TO_UNIT(mynor); com = com_addr(unit); if (com == NULL || com->gone) return (ENODEV); return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); } static void siobusycheck(chan) void *chan; { struct com_s *com; int s; com = (struct com_s *)chan; /* * Clear TS_BUSY if low-level output is complete. * spl locking is sufficient because siointr1() does not set CS_BUSY. * If siointr1() clears CS_BUSY after we look at it, then we'll get * called again. Reading the line status port outside of siointr1() * is safe because CS_BUSY is clear so there are no output interrupts * to lose. */ s = spltty(); if (com->state & CS_BUSY) com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ else if ((read_vuart_port(UART_LSR) & (LSR_TSRE | LSR_TXRDY)) == (LSR_TSRE | LSR_TXRDY)) { com->tp->t_state &= ~TS_BUSY; ttwwakeup(com->tp); com->extra_state &= ~CSE_BUSYCHECK; } else timeout(siobusycheck, com, hz / 100); splx(s); } static void siodtrwakeup(chan) void *chan; { struct com_s *com; com = (struct com_s *)chan; com->state &= ~CS_DTR_OFF; wakeup(&com->dtr_wait); } /* * Call this function with the sio_lock mutex held. It will return with the * lock still held. */ static void sioinput(com) struct com_s *com; { u_char *buf; int incc; u_char line_status; int recv_data; struct tty *tp; buf = com->ibuf; tp = com->tp; if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { com_events -= (com->iptr - com->ibuf); com->iptr = com->ibuf; return; } if (tp->t_state & TS_CAN_BYPASS_L_RINT) { /* * Avoid the grotesquely inefficient lineswitch routine * (ttyinput) in "raw" mode. It usually takes about 450 * instructions (that's without canonical processing or echo!). * slinput is reasonably fast (usually 40 instructions plus * call overhead). */ do { /* * This may look odd, but it is using save-and-enable * semantics instead of the save-and-disable semantics * that are used everywhere else. */ mtx_unlock_spin(&sio_lock); incc = com->iptr - buf; if (tp->t_rawq.c_cc + incc > tp->t_ihiwat && (com->state & CS_RTS_IFLOW || tp->t_iflag & IXOFF) && !(tp->t_state & TS_TBLOCK)) ttyblock(tp); com->delta_error_counts[CE_TTY_BUF_OVERFLOW] += b_to_q((char *)buf, incc, &tp->t_rawq); buf += incc; tk_nin += incc; tk_rawcc += incc; tp->t_rawcc += incc; ttwakeup(tp); if (tp->t_state & TS_TTSTOP && (tp->t_iflag & IXANY || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { tp->t_state &= ~TS_TTSTOP; tp->t_lflag &= ~FLUSHO; comstart(tp); } mtx_lock_spin(&sio_lock); } while (buf < com->iptr); } else { do { /* * This may look odd, but it is using save-and-enable * semantics instead of the save-and-disable semantics * that are used everywhere else. */ mtx_unlock_spin(&sio_lock); line_status = buf[com->ierroff]; recv_data = *buf++; if (line_status & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { if (line_status & LSR_BI) recv_data |= TTY_BI; if (line_status & LSR_FE) recv_data |= TTY_FE; if (line_status & LSR_OE) recv_data |= TTY_OE; if (line_status & LSR_PE) recv_data |= TTY_PE; } (*linesw[tp->t_line].l_rint)(recv_data, tp); mtx_lock_spin(&sio_lock); } while (buf < com->iptr); } com_events -= (com->iptr - com->ibuf); com->iptr = com->ibuf; /* * There is now room for another low-level buffer full of input, * so enable RTS if it is now disabled and there is room in the * high-level buffer. */ if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && !(tp->t_state & TS_TBLOCK)) write_vuart_port(UART_MCR, com->mcr_image |= MCR_RTS); } void siointr(arg) void *arg; { mtx_lock_spin(&sio_lock); dp_dsp_isr(); mtx_unlock_spin(&sio_lock); } static void siointr1(com) struct com_s *com; { u_char line_status; u_char modem_status; u_char *ioptr; u_char recv_data; u_char int_ctl; u_char int_ctl_new; struct timecounter *tc; u_int count; int_ctl = read_vuart_port(UART_IER); int_ctl_new = int_ctl; while (!com->gone) { if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { modem_status = read_vuart_port(UART_MSR); if ((modem_status ^ com->last_modem_status) & MSR_DCD) { tc = timecounter; count = tc->tc_get_timecount(tc); pps_event(&com->pps, tc, count, (modem_status & MSR_DCD) ? PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); } } line_status = read_vuart_port(UART_LSR); /* input event? (check first to help avoid overruns) */ while (line_status & LSR_RCV_MASK) { /* break/unnattached error bits or real input? */ if (!(line_status & LSR_RXRDY)) recv_data = 0; else recv_data = read_vuart_port(UART_DATA);; if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { /* * Don't store BI if IGNBRK or FE/PE if IGNPAR. * Otherwise, push the work to a higher level * (to handle PARMRK) if we're bypassing. * Otherwise, convert BI/FE and PE+INPCK to 0. * * This makes bypassing work right in the * usual "raw" case (IGNBRK set, and IGNPAR * and INPCK clear). * * Note: BI together with FE/PE means just BI. */ if (line_status & LSR_BI) { if (com->tp == NULL || com->tp->t_iflag & IGNBRK) goto cont; } else { if (com->tp == NULL || com->tp->t_iflag & IGNPAR) goto cont; } if (com->tp->t_state & TS_CAN_BYPASS_L_RINT && (line_status & (LSR_BI | LSR_FE) || com->tp->t_iflag & INPCK)) recv_data = 0; } ++com->bytes_in; if (com->hotchar != 0 && recv_data == com->hotchar) swi_sched(sio_fast_ih, SWI_NOSWITCH); ioptr = com->iptr; if (ioptr >= com->ibufend) CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); else { if (com->do_timestamp) microtime(&com->timestamp); ++com_events; swi_sched(sio_slow_ih, SWI_DELAY); ioptr[0] = recv_data; ioptr[com->ierroff] = line_status; com->iptr = ++ioptr; if (ioptr == com->ihighwater && com->state & CS_RTS_IFLOW) write_vuart_port(UART_MCR, com->mcr_image &= ~MCR_RTS); if (line_status & LSR_OE) CE_RECORD(com, CE_OVERRUN); } cont: /* * "& 0x7F" is to avoid the gcc-1.40 generating a slow * jump from the top of the loop to here */ line_status = read_vuart_port(UART_LSR) & 0x7F; } /* modem status change? (always check before doing output) */ modem_status = read_vuart_port(UART_MSR); if (modem_status != com->last_modem_status) { if (com->do_dcd_timestamp && !(com->last_modem_status & MSR_DCD) && modem_status & MSR_DCD) microtime(&com->dcd_timestamp); /* * Schedule high level to handle DCD changes. Note * that we don't use the delta bits anywhere. Some * UARTs mess them up, and it's easy to remember the * previous bits and calculate the delta. */ com->last_modem_status = modem_status; if (!(com->state & CS_CHECKMSR)) { com_events += LOTS_OF_EVENTS; com->state |= CS_CHECKMSR; swi_sched(sio_fast_ih, SWI_NOSWITCH); } /* handle CTS change immediately for crisp flow ctl */ if (com->state & CS_CTS_OFLOW) { if (modem_status & MSR_CTS) com->state |= CS_ODEVREADY; else com->state &= ~CS_ODEVREADY; } } /* output queued and everything ready? */ if (line_status & LSR_TXRDY && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { ioptr = com->obufq.l_head; if (com->tx_fifo_size > 1) { u_int ocount; ocount = com->obufq.l_tail - ioptr; if (ocount > com->tx_fifo_size) ocount = com->tx_fifo_size; com->bytes_out += ocount; do write_vuart_port(UART_DATA, *ioptr++); while (--ocount != 0); } else { write_vuart_port(UART_DATA, *ioptr++); ++com->bytes_out; } com->obufq.l_head = ioptr; if (ioptr >= com->obufq.l_tail) { struct lbq *qp; qp = com->obufq.l_next; qp->l_queued = FALSE; qp = qp->l_next; if (qp != NULL) { com->obufq.l_head = qp->l_head; com->obufq.l_tail = qp->l_tail; com->obufq.l_next = qp; } else { /* output just completed */ com->state &= ~CS_BUSY; } if (!(com->state & CS_ODONE)) { com_events += LOTS_OF_EVENTS; com->state |= CS_ODONE; /* handle at high level ASAP */ swi_sched(sio_fast_ih, SWI_NOSWITCH); } } } /* finished? */ if ((read_vuart_port(UART_IIR) & IIR_IMASK) == IIR_NOPEND) return; } } static int sioioctl(dev, cmd, data, flag, p) dev_t dev; u_long cmd; caddr_t data; int flag; struct proc *p; { struct com_s *com; int error; int mynor; int s; struct tty *tp; #if defined(COMPAT_43) || defined(COMPAT_SUNOS) u_long oldcmd; struct termios term; #endif mynor = minor(dev); com = com_addr(MINOR_TO_UNIT(mynor)); if (com == NULL || com->gone) return (ENODEV); if (mynor & CONTROL_MASK) { struct termios *ct; switch (mynor & CONTROL_MASK) { case CONTROL_INIT_STATE: ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; break; case CONTROL_LOCK_STATE: ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; break; default: return (ENODEV); /* /dev/nodev */ } switch (cmd) { case TIOCSETA: error = suser(p); if (error != 0) return (error); *ct = *(struct termios *)data; return (0); case TIOCGETA: *(struct termios *)data = *ct; return (0); case TIOCGETD: *(int *)data = TTYDISC; return (0); case TIOCGWINSZ: bzero(data, sizeof(struct winsize)); return (0); default: return (ENOTTY); } } tp = com->tp; #if defined(COMPAT_43) || defined(COMPAT_SUNOS) term = tp->t_termios; oldcmd = cmd; error = ttsetcompat(tp, &cmd, data, &term); if (error != 0) return (error); if (cmd != oldcmd) data = (caddr_t)&term; #endif if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { int cc; struct termios *dt = (struct termios *)data; struct termios *lt = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; dt->c_iflag = (tp->t_iflag & lt->c_iflag) | (dt->c_iflag & ~lt->c_iflag); dt->c_oflag = (tp->t_oflag & lt->c_oflag) | (dt->c_oflag & ~lt->c_oflag); dt->c_cflag = (tp->t_cflag & lt->c_cflag) | (dt->c_cflag & ~lt->c_cflag); dt->c_lflag = (tp->t_lflag & lt->c_lflag) | (dt->c_lflag & ~lt->c_lflag); for (cc = 0; cc < NCCS; ++cc) if (lt->c_cc[cc] != 0) dt->c_cc[cc] = tp->t_cc[cc]; if (lt->c_ispeed != 0) dt->c_ispeed = tp->t_ispeed; if (lt->c_ospeed != 0) dt->c_ospeed = tp->t_ospeed; } error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); if (error != ENOIOCTL) return (error); s = spltty(); error = ttioctl(tp, cmd, data, flag); disc_optim(tp, &tp->t_termios, com); if (error != ENOIOCTL) { splx(s); return (error); } switch (cmd) { case TIOCSBRK: write_vuart_port(UART_CFCR, com->cfcr_image |= CFCR_SBREAK); break; case TIOCCBRK: write_vuart_port(UART_CFCR, com->cfcr_image &= ~CFCR_SBREAK); break; case TIOCSDTR: (void)commctl(com, TIOCM_DTR, DMBIS); break; case TIOCCDTR: (void)commctl(com, TIOCM_DTR, DMBIC); break; /* * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The * changes get undone on the next call to comparam(). */ case TIOCMSET: (void)commctl(com, *(int *)data, DMSET); break; case TIOCMBIS: (void)commctl(com, *(int *)data, DMBIS); break; case TIOCMBIC: (void)commctl(com, *(int *)data, DMBIC); break; case TIOCMGET: *(int *)data = commctl(com, 0, DMGET); break; case TIOCMSDTRWAIT: /* must be root since the wait applies to following logins */ error = suser(p); if (error != 0) { splx(s); return (error); } com->dtr_wait = *(int *)data * hz / 100; break; case TIOCMGDTRWAIT: *(int *)data = com->dtr_wait * 100 / hz; break; case TIOCTIMESTAMP: com->do_timestamp = TRUE; *(struct timeval *)data = com->timestamp; break; case TIOCDCDTIMESTAMP: com->do_dcd_timestamp = TRUE; *(struct timeval *)data = com->dcd_timestamp; break; default: splx(s); error = pps_ioctl(cmd, data, &com->pps); if (error == ENODEV) error = ENOTTY; return (error); } splx(s); return (0); } /* software interrupt handler for SWI_TTY */ static void siopoll(void *dummy) { int unit; if (com_events == 0) return; repeat: for (unit = 0; unit < sio_numunits; ++unit) { struct com_s *com; int incc; struct tty *tp; com = com_addr(unit); if (com == NULL) continue; tp = com->tp; if (tp == NULL || com->gone) { /* * Discard any events related to never-opened or * going-away devices. */ mtx_lock_spin(&sio_lock); incc = com->iptr - com->ibuf; com->iptr = com->ibuf; if (com->state & CS_CHECKMSR) { incc += LOTS_OF_EVENTS; com->state &= ~CS_CHECKMSR; } com_events -= incc; mtx_unlock_spin(&sio_lock); continue; } if (com->iptr != com->ibuf) { mtx_lock_spin(&sio_lock); sioinput(com); mtx_unlock_spin(&sio_lock); } if (com->state & CS_CHECKMSR) { u_char delta_modem_status; mtx_lock_spin(&sio_lock); delta_modem_status = com->last_modem_status ^ com->prev_modem_status; com->prev_modem_status = com->last_modem_status; com_events -= LOTS_OF_EVENTS; com->state &= ~CS_CHECKMSR; mtx_unlock_spin(&sio_lock); if (delta_modem_status & MSR_DCD) (*linesw[tp->t_line].l_modem) (tp, com->prev_modem_status & MSR_DCD); } if (com->state & CS_ODONE) { mtx_lock_spin(&sio_lock); com_events -= LOTS_OF_EVENTS; com->state &= ~CS_ODONE; mtx_unlock_spin(&sio_lock); if (!(com->state & CS_BUSY) && !(com->extra_state & CSE_BUSYCHECK)) { timeout(siobusycheck, com, hz / 100); com->extra_state |= CSE_BUSYCHECK; } (*linesw[tp->t_line].l_start)(tp); } if (com_events == 0) break; } if (com_events >= LOTS_OF_EVENTS) goto repeat; } static int comparam(tp, t) struct tty *tp; struct termios *t; { u_int cfcr; int cflag; struct com_s *com; int divisor; u_char dlbh; u_char dlbl; int s; int unit; /* do historical conversions */ if (t->c_ispeed == 0) t->c_ispeed = t->c_ospeed; /* check requested parameters */ divisor = ttspeedtab(t->c_ospeed, comspeedtab); if (divisor < 0 || (divisor > 0 && t->c_ispeed != t->c_ospeed)) return (EINVAL); /* parameters are OK, convert them to the com struct and the device */ unit = DEV_TO_UNIT(tp->t_dev); com = com_addr(unit); if (com == NULL) return (ENODEV); s = spltty(); if (divisor == 0) (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ else (void)commctl(com, TIOCM_DTR, DMBIS); cflag = t->c_cflag; switch (cflag & CSIZE) { case CS5: cfcr = CFCR_5BITS; break; case CS6: cfcr = CFCR_6BITS; break; case CS7: cfcr = CFCR_7BITS; break; default: cfcr = CFCR_8BITS; break; } if (cflag & PARENB) { cfcr |= CFCR_PENAB; if (!(cflag & PARODD)) cfcr |= CFCR_PEVEN; } if (cflag & CSTOPB) cfcr |= CFCR_STOPB; if (com->hasfifo && divisor != 0) { /* * Use a fifo trigger level low enough so that the input * latency from the fifo is less than about 16 msec and * the total latency is less than about 30 msec. These * latencies are reasonable for humans. Serial comms * protocols shouldn't expect anything better since modem * latencies are larger. */ com->fifo_image = t->c_ospeed <= 4800 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH; write_vuart_port(UART_FIFO, com->fifo_image); } /* * This returns with interrupts disabled so that we can complete * the speed change atomically. Keeping interrupts disabled is * especially important while com_data is hidden. */ (void) siosetwater(com, t->c_ispeed); if (divisor != 0) { write_vuart_port(UART_CFCR, cfcr | CFCR_DLAB); /* * Only set the divisor registers if they would change, * since on some 16550 incompatibles (UMC8669F), setting * them while input is arriving them loses sync until * data stops arriving. */ dlbl = divisor & 0xFF; if (read_vuart_port(UART_DLBL) != dlbl) write_vuart_port(UART_DLBL, dlbl); dlbh = (u_int) divisor >> 8; if (read_vuart_port(UART_DLBH) != dlbh) write_vuart_port(UART_DLBH, dlbl); } write_vuart_port(UART_CFCR, com->cfcr_image = cfcr); if (!(tp->t_state & TS_TTSTOP)) com->state |= CS_TTGO; if (cflag & CRTS_IFLOW) { com->state |= CS_RTS_IFLOW; /* * If CS_RTS_IFLOW just changed from off to on, the change * needs to be propagated to MCR_RTS. This isn't urgent, * so do it later by calling comstart() instead of repeating * a lot of code from comstart() here. */ } else if (com->state & CS_RTS_IFLOW) { com->state &= ~CS_RTS_IFLOW; /* * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS * on here, since comstart() won't do it later. */ write_vuart_port(UART_MCR, com->mcr_image |= MCR_RTS); } /* * Set up state to handle output flow control. * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? * Now has 10+ msec latency, while CTS flow has 50- usec latency. */ com->state |= CS_ODEVREADY; com->state &= ~CS_CTS_OFLOW; if (cflag & CCTS_OFLOW) { com->state |= CS_CTS_OFLOW; if (!(com->last_modem_status & MSR_CTS)) com->state &= ~CS_ODEVREADY; } write_vuart_port(UART_CFCR, com->cfcr_image); /* XXX shouldn't call functions while intrs are disabled. */ disc_optim(tp, t, com); /* * Recover from fiddling with CS_TTGO. We used to call siointr1() * unconditionally, but that defeated the careful discarding of * stale input in sioopen(). */ if (com->state >= (CS_BUSY | CS_TTGO)) siointr1(com); mtx_unlock_spin(&sio_lock); splx(s); comstart(tp); if (com->ibufold != NULL) { free(com->ibufold, M_DEVBUF); com->ibufold = NULL; } return (0); } /* * This function must be called with the sio_lock mutex released and will * return with it obtained. */ static int siosetwater(com, speed) struct com_s *com; speed_t speed; { int cp4ticks; u_char *ibuf; int ibufsize; struct tty *tp; /* * Make the buffer size large enough to handle a softtty interrupt * latency of about 2 ticks without loss of throughput or data * (about 3 ticks if input flow control is not used or not honoured, * but a bit less for CS5-CS7 modes). */ cp4ticks = speed / 10 / hz * 4; for (ibufsize = 128; ibufsize < cp4ticks;) ibufsize <<= 1; if (ibufsize == com->ibufsize) { mtx_lock_spin(&sio_lock); return (0); } /* * Allocate input buffer. The extra factor of 2 in the size is * to allow for an error byte for each input byte. */ ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); if (ibuf == NULL) { mtx_lock_spin(&sio_lock); return (ENOMEM); } /* Initialize non-critical variables. */ com->ibufold = com->ibuf; com->ibufsize = ibufsize; tp = com->tp; if (tp != NULL) { tp->t_ififosize = 2 * ibufsize; tp->t_ispeedwat = (speed_t)-1; tp->t_ospeedwat = (speed_t)-1; } /* * Read current input buffer, if any. Continue with interrupts * disabled. */ mtx_lock_spin(&sio_lock); if (com->iptr != com->ibuf) sioinput(com); /*- * Initialize critical variables, including input buffer watermarks. * The external device is asked to stop sending when the buffer * exactly reaches high water, or when the high level requests it. * The high level is notified immediately (rather than at a later * clock tick) when this watermark is reached. * The buffer size is chosen so the watermark should almost never * be reached. * The low watermark is invisibly 0 since the buffer is always * emptied all at once. */ com->iptr = com->ibuf = ibuf; com->ibufend = ibuf + ibufsize; com->ierroff = ibufsize; com->ihighwater = ibuf + 3 * ibufsize / 4; return (0); } static void comstart(tp) struct tty *tp; { struct com_s *com; int s; int unit; unit = DEV_TO_UNIT(tp->t_dev); com = com_addr(unit); if (com == NULL) return; s = spltty(); mtx_lock_spin(&sio_lock); if (tp->t_state & TS_TTSTOP) com->state &= ~CS_TTGO; else com->state |= CS_TTGO; if (tp->t_state & TS_TBLOCK) { if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) write_vuart_port(UART_MCR, com->mcr_image &= ~MCR_RTS); } else { if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater && com->state & CS_RTS_IFLOW) write_vuart_port(UART_MCR, com->mcr_image |= MCR_RTS); } mtx_unlock_spin(&sio_lock); if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { ttwwakeup(tp); splx(s); return; } if (tp->t_outq.c_cc != 0) { struct lbq *qp; struct lbq *next; if (!com->obufs[0].l_queued) { com->obufs[0].l_tail = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, sizeof com->obuf1); com->obufs[0].l_next = NULL; com->obufs[0].l_queued = TRUE; mtx_lock_spin(&sio_lock); if (com->state & CS_BUSY) { qp = com->obufq.l_next; while ((next = qp->l_next) != NULL) qp = next; qp->l_next = &com->obufs[0]; } else { com->obufq.l_head = com->obufs[0].l_head; com->obufq.l_tail = com->obufs[0].l_tail; com->obufq.l_next = &com->obufs[0]; com->state |= CS_BUSY; } mtx_unlock_spin(&sio_lock); } if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { com->obufs[1].l_tail = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, sizeof com->obuf2); com->obufs[1].l_next = NULL; com->obufs[1].l_queued = TRUE; mtx_lock_spin(&sio_lock); if (com->state & CS_BUSY) { qp = com->obufq.l_next; while ((next = qp->l_next) != NULL) qp = next; qp->l_next = &com->obufs[1]; } else { com->obufq.l_head = com->obufs[1].l_head; com->obufq.l_tail = com->obufs[1].l_tail; com->obufq.l_next = &com->obufs[1]; com->state |= CS_BUSY; } mtx_unlock_spin(&sio_lock); } tp->t_state |= TS_BUSY; } mtx_lock_spin(&sio_lock); if (com->state >= (CS_BUSY | CS_TTGO)) siointr1(com); /* fake interrupt to start output */ mtx_unlock_spin(&sio_lock); ttwwakeup(tp); splx(s); } static void comstop(tp, rw) struct tty *tp; int rw; { struct com_s *com; com = com_addr(DEV_TO_UNIT(tp->t_dev)); if (com == NULL || com->gone) return; mtx_lock_spin(&sio_lock); if (rw & FWRITE) { if (com->hasfifo) write_vuart_port(UART_FIFO, FIFO_XMT_RST | com->fifo_image); com->obufs[0].l_queued = FALSE; com->obufs[1].l_queued = FALSE; if (com->state & CS_ODONE) com_events -= LOTS_OF_EVENTS; com->state &= ~(CS_ODONE | CS_BUSY); com->tp->t_state &= ~TS_BUSY; } if (rw & FREAD) { if (com->hasfifo) write_vuart_port(UART_FIFO, FIFO_RCV_RST | com->fifo_image); com_events -= (com->iptr - com->ibuf); com->iptr = com->ibuf; } mtx_unlock_spin(&sio_lock); comstart(tp); } static int commctl(com, bits, how) struct com_s *com; int bits; int how; { int mcr; int msr; if (how == DMGET) { bits = TIOCM_LE; /* XXX - always enabled while open */ mcr = com->mcr_image; if (mcr & MCR_DTR) bits |= TIOCM_DTR; if (mcr & MCR_RTS) bits |= TIOCM_RTS; msr = com->prev_modem_status; if (msr & MSR_CTS) bits |= TIOCM_CTS; if (msr & MSR_DCD) bits |= TIOCM_CD; if (msr & MSR_DSR) bits |= TIOCM_DSR; /* * XXX - MSR_RI is naturally volatile, and we make MSR_TERI * more volatile by reading the modem status a lot. Perhaps * we should latch both bits until the status is read here. */ if (msr & (MSR_RI | MSR_TERI)) bits |= TIOCM_RI; return (bits); } mcr = 0; if (bits & TIOCM_DTR) mcr |= MCR_DTR; if (bits & TIOCM_RTS) mcr |= MCR_RTS; if (com->gone) return(0); mtx_lock_spin(&sio_lock); switch (how) { case DMSET: write_vuart_port(UART_MCR, com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); break; case DMBIS: write_vuart_port(UART_MCR, com->mcr_image |= mcr); break; case DMBIC: write_vuart_port(UART_MCR, com->mcr_image &= ~mcr); break; } mtx_unlock_spin(&sio_lock); return (0); } static void siosettimeout() { struct com_s *com; bool_t someopen; int unit; /* * Set our timeout period to 1 second if no polled devices are open. * Otherwise set it to max(1/200, 1/hz). * Enable timeouts iff some device is open. */ untimeout(comwakeup, (void *)NULL, sio_timeout_handle); sio_timeout = hz; someopen = FALSE; for (unit = 0; unit < sio_numunits; ++unit) { com = com_addr(unit); if (com != NULL && com->tp != NULL && com->tp->t_state & TS_ISOPEN && !com->gone) { someopen = TRUE; } } if (someopen) { sio_timeouts_until_log = hz / sio_timeout; sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); } else { /* Flush error messages, if any. */ sio_timeouts_until_log = 1; comwakeup((void *)NULL); untimeout(comwakeup, (void *)NULL, sio_timeout_handle); } } static void comwakeup(chan) void *chan; { struct com_s *com; int unit; sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); /* * Recover from lost output interrupts. * Poll any lines that don't use interrupts. */ for (unit = 0; unit < sio_numunits; ++unit) { com = com_addr(unit); if (com != NULL && !com->gone && (com->state >= (CS_BUSY | CS_TTGO))) { mtx_lock_spin(&sio_lock); siointr1(com); mtx_unlock_spin(&sio_lock); } } /* * Check for and log errors, but not too often. */ if (--sio_timeouts_until_log > 0) return; sio_timeouts_until_log = hz / sio_timeout; for (unit = 0; unit < sio_numunits; ++unit) { int errnum; com = com_addr(unit); if (com == NULL) continue; if (com->gone) continue; for (errnum = 0; errnum < CE_NTYPES; ++errnum) { u_int delta; u_long total; mtx_lock_spin(&sio_lock); delta = com->delta_error_counts[errnum]; com->delta_error_counts[errnum] = 0; mtx_unlock_spin(&sio_lock); if (delta == 0) continue; total = com->error_counts[errnum] += delta; log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", unit, delta, error_desc[errnum], delta == 1 ? "" : "s", total); } } } static void disc_optim(tp, t, com) struct tty *tp; struct termios *t; struct com_s *com; { if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) && (!(t->c_iflag & PARMRK) || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) && linesw[tp->t_line].l_rint == ttyinput) tp->t_state |= TS_CAN_BYPASS_L_RINT; else tp->t_state &= ~TS_CAN_BYPASS_L_RINT; com->hotchar = linesw[tp->t_line].l_hotchar; } DRIVER_MODULE(ltmdm, pci, ltmdm_pci_driver, ltmdm_devclass, 0, 0);