diff -ur /usr/src/sys/amd64/amd64/cpu_switch.S src/sys/amd64/amd64/cpu_switch.S
--- /usr/src/sys/amd64/amd64/cpu_switch.S	Mon Mar 20 13:16:37 2006
+++ src/sys/amd64/amd64/cpu_switch.S	Wed May 24 17:17:36 2006
@@ -38,6 +38,8 @@
 
 #include "assym.s"
 
+.global lazytlb
+
 /*****************************************************************************/
 /* Scheduling                                                                */
 /*****************************************************************************/
@@ -147,6 +149,8 @@
 
 	/* switch address space */
 	movq	PCB_CR3(%r8),%rdx
+	cmpq	%rdx,KPML4phys
+	je	_sw1
 	movq	%cr3,%rax
 	cmpq	%rdx,%rax			/* Same address space? */
 	je	sw1
@@ -162,7 +166,9 @@
 	movq	TD_PROC(%rsi),%rdx		/* newproc */
 	movq	P_VMSPACE(%rdx), %rdx
 	LK btsl	%eax, VM_PMAP+PM_ACTIVE(%rdx)	/* set new */
-
+	jmp	sw1
+_sw1:
+	incq	lazytlb
 sw1:
 	/*
 	 * At this point, we've switched address spaces and are ready
diff -ur /usr/src/sys/amd64/amd64/machdep.c src/sys/amd64/amd64/machdep.c
--- /usr/src/sys/amd64/amd64/machdep.c	Tue Mar 14 17:13:54 2006
+++ src/sys/amd64/amd64/machdep.c	Wed May 24 16:25:08 2006
@@ -135,7 +135,7 @@
 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
 
 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
-extern void dblfault_handler(void);
+extern void dblfault_handler(struct trapframe *);
 
 extern void printcpuinfo(void);	/* XXX header file */
 extern void identify_cpu(void);
@@ -226,6 +226,16 @@
 	vm_pager_bufferinit();
 
 	cpu_setregs();
+
+	printf("cpu %d HWCR %lx\n", 0, rdmsr(0xc0010015));
+        if (!(rdmsr(0xc0010015) & (1 << 6))) {
+                long hwcr;
+                hwcr = rdmsr(0xc0010015);
+                hwcr |= (1 << 6);
+                wrmsr(0xc0010015, hwcr);
+        }
+        printf("cpu %d new HWCR %lx\n", 0, rdmsr(0xc0010015));
+
 }
 
 /*
@@ -511,6 +521,10 @@
 static int	cpu_idle_hlt = 1;
 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
     &cpu_idle_hlt, 0, "Idle loop HLT enable");
+
+int	lazytlb = 0;
+SYSCTL_INT(_machdep, OID_AUTO, lazytlb, CTLFLAG_RW,
+    &lazytlb, 0, "");
 
 static void
 cpu_idle_default(void)
diff -ur /usr/src/sys/amd64/amd64/mp_machdep.c src/sys/amd64/amd64/mp_machdep.c
--- /usr/src/sys/amd64/amd64/mp_machdep.c	Sun Apr 30 11:25:17 2006
+++ src/sys/amd64/amd64/mp_machdep.c	Wed May 24 16:25:44 2006
@@ -531,6 +531,15 @@
 		panic("cpuid mismatch! boom!!");
 	}
 
+	//printf("cpu %d HWCR %lx\n", cpu, rdmsr(0xc0010015));
+	if (!(rdmsr(0xc0010015) & (1 << 6))) {
+		long hwcr;
+		hwcr = rdmsr(0xc0010015);
+		hwcr |= (1 << 6);
+		wrmsr(0xc0010015, hwcr);
+	}
+	//printf("cpu %d new HWCR %lx\n", cpu, rdmsr(0xc0010015));
+
 	/* Initialize curthread. */
 	KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
 	PCPU_SET(curthread, PCPU_GET(idlethread));