/*-
 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
 *
 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
 * Copyright (c) 2021 Soren Schmidt <sos@DeepCore.dk>
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 */

#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>

#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/proc.h>
#include <sys/rman.h>
#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/gpio.h>

#include <machine/bus.h>
#include <machine/resource.h>
#include <machine/intr.h>

#include <dev/gpio/gpiobusvar.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
#include <dev/extres/clk/clk.h>

#include "gpio_if.h"
#include "pic_if.h"

#define	RK_GPIO_SWPORTA_DR	0x00	/* Data register */
#define	RK_GPIO_SWPORTA_DDR	0x04	/* Data direction register */
#define	RK_GPIO_INTEN		0x30	/* Interrupt enable register */
#define	RK_GPIO_INTMASK		0x34	/* Interrupt mask register */
#define	RK_GPIO_INTTYPE_LEVEL	0x38	/* Interrupt level register */
#define	RK_GPIO_INT_POLARITY	0x3C	/* Interrupt polarity register */
#define	RK_GPIO_INT_STATUS	0x40	/* Interrupt status register */
#define	RK_GPIO_INT_RAWSTATUS	0x44	/* Raw Interrupt status register */
#define	RK_GPIO_DEBOUNCE	0x48	/* Debounce enable register */
#define	RK_GPIO_PORTA_EOI	0x4C	/* Clear interrupt register */
#define	RK_GPIO_EXT_PORTA	0x50	/* External port register */
#define	RK_GPIO_LS_SYNC		0x60	/* Level sensitive syncronization */

#define RK_GPIO_DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
				GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN | \
                                GPIO_INTR_EDGE_RISING | GPIO_INTR_EDGE_FALLING|\
                                GPIO_INTR_LEVEL_HIGH | GPIO_INTR_LEVEL_LOW)

#define	RK_NUM_GPIO		32

struct rk_pin_irqsrc {
        struct intr_irqsrc      isrc;
        uint32_t                irq;
        uint32_t                mode;
};

struct rk_gpio_softc {
	device_t		dev;
	device_t		busdev;
	struct mtx		mtx;
	struct resource		*res[2];
	void                    *ihandle;
	clk_t			clk;
	device_t		pinctrl;
	struct rk_pin_irqsrc	sc_isrcs[RK_NUM_GPIO];
};

static struct ofw_compat_data compat_data[] = {
	{"rockchip,gpio-bank", 1},
	{NULL,             0}
};

static struct resource_spec rk_gpio_spec[] = {
	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
	{ SYS_RES_IRQ,		0,	RF_ACTIVE },
	{ -1, 0 }
};

static int rk_gpio_detach(device_t dev);

#define	RK_GPIO_LOCK(_sc)		mtx_lock_spin(&(_sc)->mtx)
#define	RK_GPIO_UNLOCK(_sc)		mtx_unlock_spin(&(_sc)->mtx)
#define	RK_GPIO_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->mtx, MA_OWNED)

#define	RK_GPIO_READ(_sc, _o)		bus_read_4(sc->res[0], _o)
#define	RK_GPIO_WRITE(_sc, _o, _v)	bus_write_4(sc->res[0], _o, _v)
#define RK_GPIO_MASK_SET(_sc, _o, _m, _s) \
					bus_write_4(sc->res[0], _o, 	\
					(bus_read_4(sc->res[0], _o) & ~_m) | _s)

#define RK_PIC_INTR_ISRC(sc, irq) (&(sc->sc_isrcs[irq].isrc))


static int
rk_gpio_probe(device_t dev)
{

	if (!ofw_bus_status_okay(dev))
		return (ENXIO);

	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
		return (ENXIO);

	device_set_desc(dev, "RockChip GPIO Bank controller");
	return (BUS_PROBE_DEFAULT);
}

static int
rk_intr(void *arg)
{
        struct rk_gpio_softc *sc;
        struct trapframe *tf;
        uint32_t status;
        int pin;

        sc = (struct rk_gpio_softc *)arg;
        tf = curthread->td_intr_frame;

	/* read and clear interrupt */
        status = RK_GPIO_READ(sc, RK_GPIO_INT_STATUS);
        RK_GPIO_WRITE(sc, RK_GPIO_PORTA_EOI, status);

        while (status != 0) {
                pin = ffs(status) - 1;
                status &= ~(1 << pin);

                if (intr_isrc_dispatch(RK_PIC_INTR_ISRC(sc, pin), tf) != 0)
                        device_printf(sc->dev, "spurious interrupt %d\n", pin);
        }
        return (FILTER_HANDLED);
}

static int
rk_gpio_attach(device_t dev)
{
	struct rk_gpio_softc *sc;
	phandle_t node;
        const char *name;
	int irq;
	int err;

	sc = device_get_softc(dev);
	sc->dev = dev;
	sc->pinctrl = device_get_parent(dev);

	node = ofw_bus_get_node(sc->dev);
	if (!OF_hasprop(node, "gpio-controller"))
		return (ENXIO);

	mtx_init(&sc->mtx, "rk gpio", "gpio", MTX_SPIN);

	if (bus_alloc_resources(dev, rk_gpio_spec, sc->res)) {
		device_printf(dev, "could not allocate resources\n");
		bus_release_resources(dev, rk_gpio_spec, sc->res);
		mtx_destroy(&sc->mtx);
		return (ENXIO);
	}

	if (clk_get_by_ofw_index(dev, 0, 0, &sc->clk) != 0) {
		device_printf(dev, "Cannot get clock\n");
		rk_gpio_detach(dev);
		return (ENXIO);
	}
	err = clk_enable(sc->clk);
	if (err) {
		device_printf(dev, "Could not enable clock %s\n",
		    clk_get_name(sc->clk));
		rk_gpio_detach(dev);
		return (ENXIO);
	}

        err = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
            rk_intr, NULL, sc, &sc->ihandle);
        if (err) {
                device_printf(dev, "%s: can't setup IRQ\n", __func__);
                rk_gpio_detach(dev);
                return (ENXIO);
        }

        name = device_get_nameunit(dev);
                                
        for (irq = 0; irq < RK_NUM_GPIO; irq++) {
                if (bootverbose) {
                        device_printf(dev,
                            "trying to register pin %d name %s\n", irq, name);
                }
                sc->sc_isrcs[irq].irq = irq;
                sc->sc_isrcs[irq].mode = GPIO_INTR_CONFORM;
                err = intr_isrc_register(RK_PIC_INTR_ISRC(sc, irq), dev, 0,
                    "%s", name);
                if (err) {
                        device_printf(dev, "can't register isrc %d\n", err);
                        rk_gpio_detach(dev);
			return (ENXIO);
                }
        }
	if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL)
                return (ENXIO);

	sc->busdev = gpiobus_attach_bus(dev);
	if (sc->busdev == NULL) {
		rk_gpio_detach(dev);
		return (ENXIO);
	}

	return (0);
}

static int
rk_gpio_detach(device_t dev)
{
	struct rk_gpio_softc *sc;

	sc = device_get_softc(dev);

	if (sc->busdev)
		gpiobus_detach_bus(dev);
	bus_release_resources(dev, rk_gpio_spec, sc->res);
	mtx_destroy(&sc->mtx);
	clk_disable(sc->clk);

	return(0);
}

static device_t
rk_gpio_get_bus(device_t dev)
{
	struct rk_gpio_softc *sc;

	sc = device_get_softc(dev);

	return (sc->busdev);
}

static int
rk_gpio_pin_max(device_t dev, int *maxpin)
{
	*maxpin = RK_NUM_GPIO - 1;

	return (0);
}

static int
rk_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
{
	struct rk_gpio_softc *sc;

	if (pin >= RK_NUM_GPIO)
		return (EINVAL);

	sc = device_get_softc(dev);

	RK_GPIO_LOCK(sc);
	snprintf(name, GPIOMAXNAME, "gpio%d", pin);
	RK_GPIO_UNLOCK(sc);

	return (0);
}

static int
rk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
{
	struct rk_gpio_softc *sc;
	uint32_t reg;

	if (pin >= RK_NUM_GPIO)
		return (EINVAL);

	sc = device_get_softc(dev);

	*flags = 0;

	RK_GPIO_LOCK(sc);
	reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR);
	RK_GPIO_UNLOCK(sc);

	if (reg & (1 << pin))
		*flags |= GPIO_PIN_OUTPUT;
	else
		*flags |= GPIO_PIN_INPUT;

	return (0);
}

static int
rk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
{
	if (pin >= RK_NUM_GPIO)
		return (EINVAL);

	*caps = RK_GPIO_DEFAULT_CAPS;

	return (0);
}

static int
rk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
{
	struct rk_gpio_softc *sc;
	uint32_t reg;

	if (pin >= RK_NUM_GPIO)
		return (EINVAL);

	sc = device_get_softc(dev);

	RK_GPIO_LOCK(sc);

	reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR);

	if (flags & GPIO_PIN_INPUT)
		reg &= ~(1 << pin);
	else if (flags & GPIO_PIN_OUTPUT)
		reg |= (1 << pin);

	RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DDR, reg);
	RK_GPIO_UNLOCK(sc);

	return (0);
}

static int
rk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
{
	struct rk_gpio_softc *sc;
	uint32_t reg;

	sc = device_get_softc(dev);

	RK_GPIO_LOCK(sc);
	reg = RK_GPIO_READ(sc, RK_GPIO_EXT_PORTA);
	RK_GPIO_UNLOCK(sc);

	*val = reg & (1 << pin) ? 1 : 0;

	return (0);
}

static int
rk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
{
	struct rk_gpio_softc *sc;
	uint32_t reg;

	sc = device_get_softc(dev);

	RK_GPIO_LOCK(sc);
	reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DR);
	if (value)
		reg |= (1 << pin);
	else
		reg &= ~(1 << pin);
	RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DR, reg);
	RK_GPIO_UNLOCK(sc);

	return (0);
}

static int
rk_gpio_pin_toggle(device_t dev, uint32_t pin)
{
	struct rk_gpio_softc *sc;
	uint32_t reg;

	sc = device_get_softc(dev);

	RK_GPIO_LOCK(sc);
	reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DR);
	if (reg & (1 << pin))
		reg &= ~(1 << pin);
	else
		reg |= (1 << pin);
	RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DR, reg);
	RK_GPIO_UNLOCK(sc);

	return (0);
}

static int
rk_gpio_pin_access_32(device_t dev, uint32_t first_pin, uint32_t clear_pins,
    uint32_t change_pins, uint32_t *orig_pins)
{
	struct rk_gpio_softc *sc;
	uint32_t reg;

	sc = device_get_softc(dev);

	RK_GPIO_LOCK(sc);
	reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DR);
	if (orig_pins)
		*orig_pins = reg;

	if ((clear_pins | change_pins) != 0) {
		reg = (reg & ~clear_pins) ^ change_pins;
		RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DR, reg);
	}
	RK_GPIO_UNLOCK(sc);

	return (0);
}

static int
rk_gpio_pin_config_32(device_t dev, uint32_t first_pin, uint32_t num_pins,
    uint32_t *pin_flags)
{
	struct rk_gpio_softc *sc;
	uint32_t reg, set, mask, flags;
	int i;

	if (first_pin != 0 || num_pins > RK_NUM_GPIO)
		return (EINVAL);

	sc = device_get_softc(dev);

	set = 0;
	mask = 0;
	for (i = 0; i < num_pins; i++) {
		mask = (mask << 1) | 1;
		flags = pin_flags[i];
		if (flags & GPIO_PIN_INPUT) {
			set &= ~(1 << i);
		} else if (flags & GPIO_PIN_OUTPUT) {
			set |= (1 << i);
		}
	}

	RK_GPIO_LOCK(sc);
	reg = RK_GPIO_READ(sc, RK_GPIO_SWPORTA_DDR);
	reg &= ~mask;
	reg |= set;
	RK_GPIO_WRITE(sc, RK_GPIO_SWPORTA_DDR, reg);
	RK_GPIO_UNLOCK(sc);

	return (0);
}

static int
rk_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
    pcell_t *gpios, uint32_t *pin, uint32_t *flags)
{

	/* The gpios are mapped as <pin flags> */
	*pin = gpios[0];
	*flags = gpios[1];

	return (0);
}

static phandle_t
rk_gpio_get_node(device_t bus, device_t dev)
{
	/* We only have one child, the GPIO bus, which needs our own node. */
	return (ofw_bus_get_node(bus));
}

#if 0 // unused
static void
rk_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
{
        struct rk_gpio_softc *sc;
        uint32_t mask;

	sc = device_get_softc(dev);

        mask = 1 << ((struct rk_pin_irqsrc *)isrc)->irq;
	RK_GPIO_LOCK(sc);
	RK_GPIO_MASK_SET(sc, RK_GPIO_INTEN, mask, 0);
	RK_GPIO_MASK_SET(sc, RK_GPIO_INTMASK, mask, 0);
	RK_GPIO_MASK_SET(sc, RK_GPIO_DEBOUNCE, mask, 0);
	RK_GPIO_UNLOCK(sc);
}

static void
rk_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
{
        struct rk_gpio_softc *sc;
	uint32_t mask;

	sc = device_get_softc(dev);

        mask = 1 << ((struct rk_pin_irqsrc *)isrc)->irq;

	RK_GPIO_LOCK(sc);
	RK_GPIO_MASK_SET(sc, RK_GPIO_DEBOUNCE, mask, mask);
	RK_GPIO_MASK_SET(sc, RK_GPIO_INTMASK, mask, 0);
	RK_GPIO_MASK_SET(sc, RK_GPIO_INTEN, mask, mask);
	RK_GPIO_UNLOCK(sc);
}
#endif

static int
rk_pic_map_intr(device_t dev, struct intr_map_data *data,
    struct intr_irqsrc **isrcp)
{
	struct rk_gpio_softc *sc;
	struct intr_map_data_gpio *gdata;
        uint32_t irq;

	sc = device_get_softc(dev);
        if (data->type != INTR_MAP_DATA_GPIO) {
        	device_printf(dev, "%s: wrong type\n", __func__);
                return (ENOTSUP);
	}
        
        gdata = (struct intr_map_data_gpio *)data;
        irq = gdata->gpio_pin_num;
        if (irq >= RK_NUM_GPIO) {
                device_printf(dev, "%s: invalid interrupt %u\n", __func__, irq);
                return (EINVAL);
        }
 
        *isrcp = RK_PIC_INTR_ISRC(sc, irq);

	return 0;
}

static int
rk_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
    struct resource *res, struct intr_map_data *data)
{
        struct rk_gpio_softc *sc;
	struct rk_pin_irqsrc *rkisrc;
        struct intr_map_data_gpio *gdata;
        uint32_t mode;
        uint8_t mask;

        if (!data) {
		device_printf(dev, "%s: no map data\n", __func__);
                return (ENOTSUP);
	}

        sc = device_get_softc(dev);
        gdata = (struct intr_map_data_gpio *)data;
	rkisrc = (struct rk_pin_irqsrc *)isrc;

        mode = gdata->gpio_intr_mode;
        mask = 1 << gdata->gpio_pin_num;

        if (rkisrc->irq != gdata->gpio_pin_num) {
                device_printf(dev, "%s: interrupts don't match\n", __func__);
                return (EINVAL);
        }

        if (isrc->isrc_handlers != 0) {
                device_printf(dev, "%s: handler already attached\n", __func__);
                return (rkisrc->mode == mode ? 0 : EINVAL);
        }
        rkisrc->mode = mode;

        RK_GPIO_LOCK(sc);

	switch (mode & GPIO_INTR_MASK) {
	case GPIO_INTR_EDGE_RISING:
		RK_GPIO_MASK_SET(sc, RK_GPIO_SWPORTA_DDR, mask, 0);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INTTYPE_LEVEL, mask, mask);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INT_POLARITY, mask, 1);
		break;
        case GPIO_INTR_EDGE_FALLING:
		RK_GPIO_MASK_SET(sc, RK_GPIO_SWPORTA_DDR, mask, 0);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INTTYPE_LEVEL, mask, mask);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INT_POLARITY, mask, 0);
		break;
        case GPIO_INTR_LEVEL_HIGH:
		RK_GPIO_MASK_SET(sc, RK_GPIO_SWPORTA_DDR, mask, 0);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INTTYPE_LEVEL, mask, 0);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INT_POLARITY, mask, 1);
		break;
        case GPIO_INTR_LEVEL_LOW:
		RK_GPIO_MASK_SET(sc, RK_GPIO_SWPORTA_DDR, mask, 0);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INTTYPE_LEVEL, mask, 0);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INT_POLARITY, mask, 0);
		break;
        default:
		RK_GPIO_MASK_SET(sc, RK_GPIO_INTMASK, mask, mask);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INTEN, mask, 0);
		RK_GPIO_UNLOCK(sc);
		return (EINVAL);
	}
	RK_GPIO_MASK_SET(sc, RK_GPIO_DEBOUNCE, mask, mask);
	RK_GPIO_MASK_SET(sc, RK_GPIO_INTMASK, mask, 0);
	RK_GPIO_MASK_SET(sc, RK_GPIO_INTEN, mask, mask);

        RK_GPIO_UNLOCK(sc);

        return (0);
}

static int
rk_pic_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
        struct resource *res, struct intr_map_data *data)
{       
        struct rk_gpio_softc *sc;
        struct rk_pin_irqsrc *irqsrc;
        uint8_t mask;

        irqsrc = (struct rk_pin_irqsrc *)isrc;
        mask = 1 << irqsrc->irq;

        sc = device_get_softc(dev);
        if (isrc->isrc_handlers == 0) {
                irqsrc->mode = GPIO_INTR_CONFORM;
                RK_GPIO_LOCK(sc);
		RK_GPIO_MASK_SET(sc, RK_GPIO_INTEN, mask, 0);
                RK_GPIO_MASK_SET(sc, RK_GPIO_INTMASK, mask, 0);
		RK_GPIO_MASK_SET(sc, RK_GPIO_DEBOUNCE, mask, 0);
                RK_GPIO_UNLOCK(sc);
        }
        return (0);
}


static device_method_t rk_gpio_methods[] = {
	/* Device interface */
	DEVMETHOD(device_probe,		rk_gpio_probe),
	DEVMETHOD(device_attach,	rk_gpio_attach),
	DEVMETHOD(device_detach,	rk_gpio_detach),

	/* GPIO protocol */
	DEVMETHOD(gpio_get_bus,		rk_gpio_get_bus),
	DEVMETHOD(gpio_pin_max,		rk_gpio_pin_max),
	DEVMETHOD(gpio_pin_getname,	rk_gpio_pin_getname),
	DEVMETHOD(gpio_pin_getflags,	rk_gpio_pin_getflags),
	DEVMETHOD(gpio_pin_getcaps,	rk_gpio_pin_getcaps),
	DEVMETHOD(gpio_pin_setflags,	rk_gpio_pin_setflags),
	DEVMETHOD(gpio_pin_get,		rk_gpio_pin_get),
	DEVMETHOD(gpio_pin_set,		rk_gpio_pin_set),
	DEVMETHOD(gpio_pin_toggle,	rk_gpio_pin_toggle),
	DEVMETHOD(gpio_pin_access_32,	rk_gpio_pin_access_32),
	DEVMETHOD(gpio_pin_config_32,	rk_gpio_pin_config_32),
	DEVMETHOD(gpio_map_gpios,	rk_gpio_map_gpios),

	/* Interrupt controller interface */
	DEVMETHOD(pic_map_intr,		rk_pic_map_intr),
	DEVMETHOD(pic_setup_intr,	rk_pic_setup_intr),
	DEVMETHOD(pic_teardown_intr,	rk_pic_teardown_intr),
	//DEVMETHOD(pic_disable_intr,	rk_pic_disable_intr),
	//DEVMETHOD(pic_enable_intr,	rk_pic_enable_intr),
	//DEVMETHOD(pic_post_filter,	rk_pic_post_filter),
	//DEVMETHOD(pic_post_ithread,	rk_pic_post_ithread),
	//DEVMETHOD(pic_pre_ithread,	rk_pic_pre_ithread),

	/* OFW bus interface */
	DEVMETHOD(ofw_bus_get_node,	rk_gpio_get_node),

	DEVMETHOD_END
};

static driver_t rk_gpio_driver = {
	"gpio",
	rk_gpio_methods,
	sizeof(struct rk_gpio_softc),
};

static devclass_t rk_gpio_devclass;

/*
 * GPIO driver is always a child of rk_pinctrl driver and should be probed
 * and attached within rk_pinctrl_attach function. Due to this, bus pass order
 * must be same as bus pass order of rk_pinctrl driver.
 */
EARLY_DRIVER_MODULE(rk_gpio, simplebus, rk_gpio_driver,
    rk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);