diff --git a/sys/dev/drm/r600_blit.c b/sys/dev/drm/r600_blit.c index 91690d2..6443d84 100644 --- a/sys/dev/drm/r600_blit.c +++ b/sys/dev/drm/r600_blit.c @@ -1876,7 +1876,7 @@ r600_blit_copy(struct drm_device *dev, /* dst */ set_render_target(dev_priv, COLOR_8_8_8_8, - dst_x + cur_size, h, + (dst_x + cur_size) / 4, h, dst_gpu_addr); /* scissors */ diff --git a/sys/dev/drm/radeon_cs.c b/sys/dev/drm/radeon_cs.c index 4fc6e7e..b523126 100644 --- a/sys/dev/drm/radeon_cs.c +++ b/sys/dev/drm/radeon_cs.c @@ -403,8 +403,8 @@ static inline int r600_cs_packet3(struct drm_radeon_cs_parser *parser, uint32_t DRM_ERROR("bad DRAW_INDEX\n"); break; } - ib_chunk->kdata[offset_dw + 1] = (offset & 0xffffffff); - ib_chunk->kdata[offset_dw + 2] = (upper_32_bits(offset) & 0xff); + ib_chunk->kdata[offset_dw + 1] += (offset & 0xffffffff); + ib_chunk->kdata[offset_dw + 2] += (upper_32_bits(offset) & 0xff); break; case R600_IT_DRAW_INDEX_AUTO: //DRM_INFO("R600_IT_DRAW_INDEX_AUTO\n"); @@ -433,8 +433,8 @@ static inline int r600_cs_packet3(struct drm_radeon_cs_parser *parser, uint32_t DRM_ERROR("bad WAIT_REG_MEM\n"); break; } - ib_chunk->kdata[offset_dw + 2] = (offset & 0xffffffff); - ib_chunk->kdata[offset_dw + 3] = (upper_32_bits(offset) & 0xff); + ib_chunk->kdata[offset_dw + 2] += (offset & 0xffffffff); + ib_chunk->kdata[offset_dw + 3] += (upper_32_bits(offset) & 0xff); } if (ret) DRM_ERROR("bad WAIT_REG_MEM\n"); @@ -469,7 +469,7 @@ static inline int r600_cs_packet3(struct drm_radeon_cs_parser *parser, uint32_t break; } ib_chunk->kdata[offset_dw + 2] += (offset & 0xffffffff); - ib_chunk->kdata[offset_dw + 3] |= (upper_32_bits(offset) & 0xff); + ib_chunk->kdata[offset_dw + 3] += (upper_32_bits(offset) & 0xff); } if (ret) DRM_ERROR("bad EVENT_WRITE\n"); @@ -488,7 +488,7 @@ static inline int r600_cs_packet3(struct drm_radeon_cs_parser *parser, uint32_t break; } ib_chunk->kdata[offset_dw + 2] += (offset & 0xffffffff); - ib_chunk->kdata[offset_dw + 3] |= (upper_32_bits(offset) & 0xff); + ib_chunk->kdata[offset_dw + 3] += (upper_32_bits(offset) & 0xff); break; case R600_IT_SET_CONFIG_REG: //DRM_INFO("R600_IT_SET_CONFIG_REG\n"); @@ -628,7 +628,7 @@ static inline int r600_cs_packet3(struct drm_radeon_cs_parser *parser, uint32_t if (ret) break; ib_chunk->kdata[offset_dw + (i * 7) + 0 + 2] += (offset & 0xffffffff); - ib_chunk->kdata[offset_dw + (i * 7) + 2 + 2] |= (upper_32_bits(offset) & 0xff); + ib_chunk->kdata[offset_dw + (i * 7) + 2 + 2] += (upper_32_bits(offset) & 0xff); break; } if (ret) diff --git a/sys/dev/drm/radeon_drv.h b/sys/dev/drm/radeon_drv.h index a1cd48b..d90d7cf 100644 --- a/sys/dev/drm/radeon_drv.h +++ b/sys/dev/drm/radeon_drv.h @@ -143,15 +143,15 @@ enum radeon_family { CHIP_R600, CHIP_RV610, CHIP_RV630, + CHIP_RV670, CHIP_RV620, CHIP_RV635, - CHIP_RV670, CHIP_RS780, CHIP_RS880, CHIP_RV770, - CHIP_RV740, CHIP_RV730, CHIP_RV710, + CHIP_RV740, CHIP_LAST, }; diff --git a/sys/dev/drm/radeon_irq.c b/sys/dev/drm/radeon_irq.c index 7f60573..20b1e6d 100644 --- a/sys/dev/drm/radeon_irq.c +++ b/sys/dev/drm/radeon_irq.c @@ -194,6 +194,9 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS) u32 r500_disp_int; u32 tmp; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return IRQ_NONE; + /* Only consider the bits we're interested in - others could be used * outside the DRM */ @@ -323,6 +326,9 @@ int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_pr drm_radeon_irq_emit_t *emit = data; int result; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return -EINVAL; + LOCK_TEST_WITH_RETURN(dev, file_priv); if (!dev_priv) { @@ -363,6 +369,9 @@ void radeon_driver_irq_preinstall(struct drm_device * dev) (drm_radeon_private_t *) dev->dev_private; u32 dummy; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return; + /* Disable *all* interrupts */ if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) RADEON_WRITE(R500_DxMODE_INT_MASK, 0); @@ -380,6 +389,9 @@ int radeon_driver_irq_postinstall(struct drm_device * dev) atomic_set(&dev_priv->swi_emitted, 0); DRM_INIT_WAITQUEUE(&dev_priv->swi_queue); + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return 0; + radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1); return 0; @@ -394,6 +406,9 @@ void radeon_driver_irq_uninstall(struct drm_device * dev) dev_priv->irq_enabled = 0; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + return; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) RADEON_WRITE(R500_DxMODE_INT_MASK, 0); /* Disable *all* interrupts */ diff --git a/sys/dev/drm/radeon_state.c b/sys/dev/drm/radeon_state.c index e032b8f..fd8388f 100644 --- a/sys/dev/drm/radeon_state.c +++ b/sys/dev/drm/radeon_state.c @@ -3024,7 +3024,10 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil value = GET_SCRATCH(dev_priv, 2); break; case RADEON_PARAM_IRQ_NR: - value = dev->irq; + if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) + value = 0; + else + value = dev->irq; break; case RADEON_PARAM_GART_BASE: value = dev_priv->gart_vm_start;