Index: sys/arm/xscale/ixp425/ixp425_qmgr.c
===================================================================
--- sys/arm/xscale/ixp425/ixp425_qmgr.c	(wersja 182747)
+++ sys/arm/xscale/ixp425/ixp425_qmgr.c	(kopia robocza)
@@ -133,10 +133,15 @@
 	device_t		sc_dev;
 	bus_space_tag_t		sc_iot;
 	bus_space_handle_t	sc_ioh;
-	struct resource		*sc_irq;	/* IRQ resource */
-	void			*sc_ih;		/* interrupt handler */
-	int			sc_rid;		/* resource id for irq */
 
+	struct resource		*sc_irq1;	/* IRQ resource */
+	void			*sc_ih1;	/* interrupt handler */
+	int			sc_rid1;	/* resource id for irq */
+
+	struct resource		*sc_irq2;
+	void			*sc_ih2;
+	int			sc_rid2;
+
 	struct qmgrInfo		qinfo[IX_QMGR_MAX_NUM_QUEUES];
 	/*
 	 * This array contains a list of queue identifiers ordered by
@@ -203,12 +208,12 @@
 	return 0;
 }
 
-static void
+static int
 ixpqmgr_attach(device_t dev)
 {
 	struct ixpqmgr_softc *sc = device_get_softc(dev);
 	struct ixp425_softc *sa = device_get_softc(device_get_parent(dev));
-	int i;
+	int i, err;
 
 	ixpqmgr_sc = sc;
 
@@ -219,14 +224,33 @@
 		panic("%s: Cannot map registers", device_get_name(dev));
 
 	/* NB: we only use the lower 32 q's */
-	sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->sc_rid,
-	    IXP425_INT_QUE1_32, IXP425_INT_QUE33_64, 2, RF_ACTIVE);
-	if (!sc->sc_irq)
+
+	/* Set up QMGR interrupts */
+	sc->sc_rid1 = 0;
+	sc->sc_irq1 = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->sc_rid1,
+	    IXP425_INT_QUE1_32, IXP425_INT_QUE1_32, 1, RF_ACTIVE);
+	sc->sc_rid2 = 1;
+	sc->sc_irq2 = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->sc_rid2,
+	    IXP425_INT_QUE33_64, IXP425_INT_QUE33_64, 1, RF_ACTIVE);
+
+	if (sc->sc_irq1 == NULL || sc->sc_irq2 == NULL)
 		panic("Unable to allocate the qmgr irqs.\n");
-	/* XXX could be a source of entropy */
-	bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE,
-		NULL, ixpqmgr_intr, NULL, &sc->sc_ih);
 
+	err = bus_setup_intr(dev, sc->sc_irq1, INTR_TYPE_NET | INTR_MPSAFE,
+	    NULL, ixpqmgr_intr, NULL, &sc->sc_ih1);
+	if (err) {
+		device_printf(dev, "failed to set up qmgr irq=%d\n",
+		   IXP425_INT_QUE1_32);
+		return (ENXIO);
+	}
+	err = bus_setup_intr(dev, sc->sc_irq2, INTR_TYPE_NET | INTR_MPSAFE,
+	    NULL, ixpqmgr_intr, NULL, &sc->sc_ih2);
+	if (err) {
+		device_printf(dev, "failed to set up qmgr irq=%d\n",
+		   IXP425_INT_QUE33_64);
+		return (ENXIO);
+	}
+
 	/* NB: softc is pre-zero'd */
 	for (i = 0; i < IX_QMGR_MAX_NUM_QUEUES; i++) {
 	    struct qmgrInfo *qi = &sc->qinfo[i];
@@ -295,17 +319,21 @@
 
 	ixpqmgr_rebuild(sc);		/* build inital priority table */
 	aqm_reset(sc);			/* reset h/w */
+	return (0);
 }
 
-static void
+static int
 ixpqmgr_detach(device_t dev)
 {
 	struct ixpqmgr_softc *sc = device_get_softc(dev);
 
 	aqm_reset(sc);		/* disable interrupts */
-	bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih);
-	bus_release_resource(dev, SYS_RES_IRQ, sc->sc_rid, sc->sc_irq);
+	bus_teardown_intr(dev, sc->sc_irq1, sc->sc_ih1);
+	bus_teardown_intr(dev, sc->sc_irq2, sc->sc_ih2);
+	bus_release_resource(dev, SYS_RES_IRQ, sc->sc_rid1, sc->sc_irq1);
+	bus_release_resource(dev, SYS_RES_IRQ, sc->sc_rid2, sc->sc_irq2);
 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, IXP425_QMGR_SIZE);
+	return (0);
 }
 
 int