diff -upr current/src/sys/arm/arm/genassym.c working-current/sys/arm/arm/genassym.c --- current/src/sys/arm/arm/genassym.c Wed Aug 8 11:27:52 2007 +++ working-current/sys/arm/arm/genassym.c Wed Dec 19 11:08:47 2007 @@ -102,6 +102,8 @@ ASSYM(P_PID, offsetof(struct proc, p_pid ASSYM(P_FLAG, offsetof(struct proc, p_flag)); ASSYM(ARM_TP_ADDRESS, ARM_TP_ADDRESS); +ASSYM(ARM_RAS_START, ARM_RAS_START); +ASSYM(ARM_RAS_END, ARM_RAS_END); ASSYM(PAGE_SIZE, PAGE_SIZE); ASSYM(PDESIZE, PDESIZE); ASSYM(PMAP_DOMAIN_KERNEL, PMAP_DOMAIN_KERNEL); diff -upr current/src/sys/arm/arm/machdep.c working-current/sys/arm/arm/machdep.c --- current/src/sys/arm/arm/machdep.c Fri Jun 1 00:52:10 2007 +++ working-current/sys/arm/arm/machdep.c Tue Dec 18 11:44:40 2007 @@ -254,9 +254,7 @@ static void cpu_startup(void *dummy) { struct pcb *pcb = thread0.td_pcb; -#ifndef ARM_CACHE_LOCK_ENABLE vm_page_t m; -#endif cpu_setup(""); identify_arm_cpu(); @@ -299,12 +297,10 @@ cpu_startup(void *dummy) pmap_set_pcb_pagedir(pmap_kernel(), pcb); thread0.td_frame = (struct trapframe *)pcb->un_32.pcb32_sp - 1; pmap_postinit(); -#ifdef ARM_CACHE_LOCK_ENABLE - pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); - arm_lock_cache_line(ARM_TP_ADDRESS); -#else m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); +#ifdef ARM_CACHE_LOCK_ENABLE + arm_lock_cache_line(ARM_TP_ADDRESS); #endif } diff -upr current/src/sys/arm/arm/swtch.S working-current/sys/arm/arm/swtch.S --- current/src/sys/arm/arm/swtch.S Wed Oct 17 15:04:09 2007 +++ working-current/sys/arm/arm/swtch.S Tue Dec 18 15:58:09 2007 @@ -205,7 +205,7 @@ ENTRY(cpu_throw) /* Set the new tp */ ldr r6, [r5, #(TD_MD + MD_TP)] - mov r5, #ARM_TP_ADDRESS + ldr r5, =ARM_TP_ADDRESS strt r6, [r5] /* Hook in a new pcb */ @@ -263,7 +263,7 @@ ENTRY(cpu_switch) * them for the new process. */ /* Store the old tp */ - mov r3, #ARM_TP_ADDRESS + ldr r3, =ARM_TP_ADDRESS ldrt r9, [r3] str r9, [r0, #(TD_MD + MD_TP)] diff -upr current/src/sys/arm/include/asmacros.h working-current/sys/arm/include/asmacros.h --- current/src/sys/arm/include/asmacros.h Fri Dec 7 12:49:35 2007 +++ working-current/sys/arm/include/asmacros.h Wed Dec 19 11:13:06 2007 @@ -68,10 +68,10 @@ mov r0, r0; /* NOP for previous instruction */ \ mrs r0, spsr_all; /* Put the SPSR on the stack */ \ str r0, [sp, #-4]!; \ - mov r0, #0xe0000004; \ + ldr r0, =ARM_RAS_START; \ mov r1, #0; \ str r1, [r0]; \ - mov r0, #0xe0000008; \ + ldr r0, =ARM_RAS_END; \ mov r1, #0xffffffff; \ str r1, [r0]; @@ -119,11 +119,11 @@ add r0, sp, #(4*13); /* Adjust the stack pointer */ \ stmia r0, {r13-r14}^; /* Push the user mode registers */ \ mov r0, r0; /* NOP for previous instruction */ \ - ldr r5, =0xe0000004; /* Check if there's any RAS */ \ + ldr r5, =ARM_RAS_START; /* Check if there's any RAS */ \ ldr r3, [r5]; \ cmp r3, #0; /* Is the update needed ? */ \ ldrgt lr, [r0, #16]; \ - ldrgt r1, =0xe0000008; \ + ldrgt r1, =ARM_RAS_END; \ ldrgt r4, [r1]; /* Get the end of the RAS */ \ movgt r2, #0; /* Reset the magic addresses */ \ strgt r2, [r5]; \ diff -upr current/src/sys/arm/include/atomic.h working-current/sys/arm/include/atomic.h --- current/src/sys/arm/include/atomic.h Fri Dec 7 12:49:35 2007 +++ working-current/sys/arm/include/atomic.h Wed Dec 19 19:28:11 2007 @@ -39,12 +39,14 @@ #ifndef _MACHINE_ATOMIC_H_ #define _MACHINE_ATOMIC_H_ - - #ifndef _LOCORE #include +#ifndef _KERNEL +#include +#endif + #ifndef I32_bit #define I32_bit (1 << 7) /* IRQ disable */ #endif @@ -71,9 +73,6 @@ : "cc" ); \ } while(0) -#define ARM_RAS_START 0xe0000004 -#define ARM_RAS_END 0xe0000008 - static __inline uint32_t __swp(uint32_t val, volatile uint32_t *ptr) { @@ -145,28 +144,24 @@ atomic_fetchadd_32(volatile uint32_t *p, static __inline u_int32_t atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval) { - register int done, ras_start; + register int done, ras_start = ARM_RAS_START; __asm __volatile("1:\n" "adr %1, 1b\n" - "mov %0, #0xe0000004\n" "str %1, [%0]\n" - "mov %0, #0xe0000008\n" "adr %1, 2f\n" - "str %1, [%0]\n" + "str %1, [%0, #4]\n" "ldr %1, [%2]\n" "cmp %1, %3\n" "streq %4, [%2]\n" "2:\n" "mov %1, #0\n" - "mov %0, #0xe0000004\n" "str %1, [%0]\n" "mov %1, #0xffffffff\n" - "mov %0, #0xe0000008\n" - "str %1, [%0]\n" + "str %1, [%0, #4]\n" "moveq %1, #1\n" "movne %1, #0\n" - : "=r" (ras_start), "=r" (done) + : "+r" (ras_start), "=r" (done) ,"+r" (p), "+r" (cmpval), "+r" (newval) : : "memory"); return (done); } @@ -174,106 +169,90 @@ atomic_cmpset_32(volatile u_int32_t *p, static __inline void atomic_add_32(volatile u_int32_t *p, u_int32_t val) { - int ras_start, start; + int start, ras_start = ARM_RAS_START; __asm __volatile("1:\n" "adr %1, 1b\n" - "mov %0, #0xe0000004\n" "str %1, [%0]\n" - "mov %0, #0xe0000008\n" "adr %1, 2f\n" - "str %1, [%0]\n" + "str %1, [%0, #4]\n" "ldr %1, [%2]\n" "add %1, %1, %3\n" "str %1, [%2]\n" "2:\n" - "mov %0, #0xe0000004\n" "mov %1, #0\n" "str %1, [%0]\n" "mov %1, #0xffffffff\n" - "mov %0, #0xe0000008\n" - "str %1, [%0]\n" - : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val) + "str %1, [%0, #4]\n" + : "+r" (ras_start), "=r" (start), "+r" (p), "+r" (val) : : "memory"); } static __inline void atomic_subtract_32(volatile u_int32_t *p, u_int32_t val) { - int ras_start, start; + int start, ras_start = ARM_RAS_START; __asm __volatile("1:\n" "adr %1, 1b\n" - "mov %0, #0xe0000004\n" "str %1, [%0]\n" - "mov %0, #0xe0000008\n" "adr %1, 2f\n" - "str %1, [%0]\n" + "str %1, [%0, #4]\n" "ldr %1, [%2]\n" "sub %1, %1, %3\n" "str %1, [%2]\n" "2:\n" - "mov %0, #0xe0000004\n" "mov %1, #0\n" "str %1, [%0]\n" "mov %1, #0xffffffff\n" - "mov %0, #0xe0000008\n" - "str %1, [%0]\n" + "str %1, [%0, #4]\n" - : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val) + : "+r" (ras_start), "=r" (start), "+r" (p), "+r" (val) : : "memory"); } static __inline void atomic_set_32(volatile uint32_t *address, uint32_t setmask) { - int ras_start, start; + int start, ras_start = ARM_RAS_START; __asm __volatile("1:\n" "adr %1, 1b\n" - "mov %0, #0xe0000004\n" "str %1, [%0]\n" - "mov %0, #0xe0000008\n" "adr %1, 2f\n" - "str %1, [%0]\n" + "str %1, [%0, #4]\n" "ldr %1, [%2]\n" "orr %1, %1, %3\n" "str %1, [%2]\n" "2:\n" - "mov %0, #0xe0000004\n" "mov %1, #0\n" "str %1, [%0]\n" "mov %1, #0xffffffff\n" - "mov %0, #0xe0000008\n" - "str %1, [%0]\n" + "str %1, [%0, #4]\n" - : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (setmask) + : "+r" (ras_start), "=r" (start), "+r" (address), "+r" (setmask) : : "memory"); } static __inline void atomic_clear_32(volatile uint32_t *address, uint32_t clearmask) { - int ras_start, start; + int start, ras_start = ARM_RAS_START; __asm __volatile("1:\n" "adr %1, 1b\n" - "mov %0, #0xe0000004\n" "str %1, [%0]\n" - "mov %0, #0xe0000008\n" "adr %1, 2f\n" - "str %1, [%0]\n" + "str %1, [%0, #4]\n" "ldr %1, [%2]\n" "bic %1, %1, %3\n" "str %1, [%2]\n" "2:\n" - "mov %0, #0xe0000004\n" "mov %1, #0\n" "str %1, [%0]\n" "mov %1, #0xffffffff\n" - "mov %0, #0xe0000008\n" - "str %1, [%0]\n" - : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (clearmask) + "str %1, [%0, #4]\n" + : "+r" (ras_start), "=r" (start), "+r" (address), "+r" (clearmask) : : "memory"); } @@ -281,26 +260,22 @@ atomic_clear_32(volatile uint32_t *addre static __inline uint32_t atomic_fetchadd_32(volatile uint32_t *p, uint32_t v) { - uint32_t ras_start, start; + uint32_t start, ras_start = ARM_RAS_START; __asm __volatile("1:\n" "adr %1, 1b\n" - "mov %0, #0xe0000004\n" "str %1, [%0]\n" - "mov %0, #0xe0000008\n" "adr %1, 2f\n" - "str %1, [%0]\n" + "str %1, [%0, #4]\n" "ldr %1, [%2]\n" - "add %0, %1, %3\n" + "add %1, %1, %3\n" "str %0, [%2]\n" "2:\n" - "mov %0, #0xe0000004\n" "mov %3, #0\n" "str %3, [%0]\n" - "mov %0, #0xe0000008\n" "mov %3, #0xffffffff\n" - "str %3, [%0]\n" - : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (v) + "str %3, [%0, #4]\n" + : "+r" (ras_start), "=r" (start), "+r" (p), "+r" (v) : : "memory"); return (start); } diff -upr current/src/sys/arm/include/sysarch.h working-current/sys/arm/include/sysarch.h --- current/src/sys/arm/include/sysarch.h Sat Feb 26 19:59:01 2005 +++ working-current/sys/arm/include/sysarch.h Wed Dec 19 19:28:11 2007 @@ -37,6 +37,18 @@ #ifndef _ARM_SYSARCH_H_ #define _ARM_SYSARCH_H_ +#include +/* + * The ARM_TP_ADDRESS points to a special purpose page, which is used as local + * store for the ARM per-thread data and Restartable Atomic Sequences support. + * Put it just above the "high" vectors' page. + */ +#define ARM_TP_ADDRESS (ARM_VECTORS_HIGH + 0x1000) +#define ARM_RAS_START (ARM_TP_ADDRESS + 4) +#define ARM_RAS_END (ARM_TP_ADDRESS + 8) + +#ifndef LOCORE + #include /* @@ -53,8 +65,6 @@ #define ARM_SET_TP 2 #define ARM_GET_TP 3 -#define ARM_TP_ADDRESS 0xe0000000 /* Magic */ - struct arm_sync_icache_args { uintptr_t addr; /* Virtual start address */ size_t len; /* Region size */ @@ -67,5 +77,7 @@ int arm_drain_writebuf (void); int sysarch(int, void *); __END_DECLS #endif + +#endif /* LOCORE */ #endif /* !_ARM_SYSARCH_H_ */