Index: i386/conf/NOTES =================================================================== RCS file: /home/ncvs/src/sys/i386/conf/NOTES,v retrieving revision 1.872 diff -c -r1.872 NOTES *** i386/conf/NOTES 2001/01/15 06:45:01 1.872 --- i386/conf/NOTES 2001/01/16 04:00:37 *************** *** 155,164 **** # # You must specify at least one CPU (the one you intend to run on); # deleting the specification for CPUs you don't need to use may make ! # parts of the system run faster. This is especially true removing ! # I386_CPU. # ! cpu I386_CPU cpu I486_CPU cpu I586_CPU # aka Pentium(tm) cpu I686_CPU # aka Pentium Pro(tm) --- 155,164 ---- # # You must specify at least one CPU (the one you intend to run on); # deleting the specification for CPUs you don't need to use may make ! # parts of the system run faster. ! # I386_CPU is mutually exclusive with the other CPU types. # ! #cpu I386_CPU cpu I486_CPU cpu I586_CPU # aka Pentium(tm) cpu I686_CPU # aka Pentium Pro(tm) Index: i386/i386/identcpu.c =================================================================== RCS file: /home/ncvs/src/sys/i386/i386/identcpu.c,v retrieving revision 1.89 diff -c -r1.89 identcpu.c *** i386/i386/identcpu.c 2000/11/21 20:16:47 1.89 --- i386/i386/identcpu.c 2001/01/15 07:30:49 *************** *** 624,638 **** panicifcpuunsupported(void) { /* * Now that we have told the user what they have, * let them know if that machine type isn't configured. */ switch (cpu_class) { case CPUCLASS_286: /* a 286 should not make it this far, anyway */ - #if !defined(I386_CPU) && !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU) - #error This kernel is not configured for one of the supported CPUs - #endif #if !defined(I386_CPU) case CPUCLASS_386: #endif --- 624,641 ---- panicifcpuunsupported(void) { + #if !defined(I386_CPU) && !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU) + #error This kernel is not configured for one of the supported CPUs + #endif + #if defined(I386_CPU) && (defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)) + #error I386_CPU is mutually exclusive with the other cpu types. + #endif /* * Now that we have told the user what they have, * let them know if that machine type isn't configured. */ switch (cpu_class) { case CPUCLASS_286: /* a 286 should not make it this far, anyway */ #if !defined(I386_CPU) case CPUCLASS_386: #endif Index: i386/i386/machdep.c =================================================================== RCS file: /home/ncvs/src/sys/i386/i386/machdep.c,v retrieving revision 1.428 diff -c -r1.428 machdep.c *** i386/i386/machdep.c 2001/01/12 07:46:28 1.428 --- i386/i386/machdep.c 2001/01/15 07:22:59 *************** *** 1118,1127 **** cr0 = rcr0(); cr0 |= CR0_NE; /* Done by npxinit() */ cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ ! #ifdef I386_CPU ! if (cpu_class != CPUCLASS_386) #endif - cr0 |= CR0_WP | CR0_AM; load_cr0(cr0); load_gs(_udatasel); } --- 1118,1126 ---- cr0 = rcr0(); cr0 |= CR0_NE; /* Done by npxinit() */ cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ ! #ifndef I386_CPU ! cr0 |= CR0_WP | CR0_AM; #endif load_cr0(cr0); load_gs(_udatasel); } Index: i386/i386/pmap.c =================================================================== RCS file: /home/ncvs/src/sys/i386/i386/pmap.c,v retrieving revision 1.267 diff -c -r1.267 pmap.c *** i386/i386/pmap.c 2001/01/10 04:43:46 1.267 --- i386/i386/pmap.c 2001/01/15 07:26:56 *************** *** 567,580 **** static PMAP_INLINE void invltlb_1pg(vm_offset_t va) { ! #if defined(I386_CPU) ! if (cpu_class == CPUCLASS_386) { ! invltlb(); ! } else #endif - { - invlpg(va); - } } static __inline void --- 567,577 ---- static PMAP_INLINE void invltlb_1pg(vm_offset_t va) { ! #ifdef I386_CPU ! invltlb(); ! #else ! invlpg(va); #endif } static __inline void *************** *** 832,838 **** pmap_new_proc(p) struct proc *p; { ! int i, updateneeded; vm_object_t upobj; vm_page_t m; struct user *up; --- 829,838 ---- pmap_new_proc(p) struct proc *p; { ! #ifdef I386_CPU ! int updateneeded; ! #endif ! int i; vm_object_t upobj; vm_page_t m; struct user *up; *************** *** 857,863 **** --- 857,865 ---- ptek = (unsigned *) vtopte((vm_offset_t) up); + #ifdef I386_CPU updateneeded = 0; + #endif for(i=0;i CPUCLASS_386)) { ! invlpg((vm_offset_t) up + i * PAGE_SIZE); ! } else { ! updateneeded = 1; ! } } vm_page_wakeup(m); --- 878,888 ---- */ *(ptek + i) = VM_PAGE_TO_PHYS(m) | PG_RW | PG_V | pgeflag; if (oldpte) { ! #ifdef I386_CPU ! updateneeded = 1; ! #else ! invlpg((vm_offset_t) up + i * PAGE_SIZE); ! #endif } vm_page_wakeup(m); *************** *** 888,895 **** --- 890,899 ---- vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); m->valid = VM_PAGE_BITS_ALL; } + #ifdef I386_CPU if (updateneeded) invltlb(); + #endif } /* *************** *** 917,930 **** oldpte = *(ptek + i); *(ptek + i) = 0; ! if ((oldpte & PG_G) || (cpu_class > CPUCLASS_386)) ! invlpg((vm_offset_t) p->p_addr + i * PAGE_SIZE); vm_page_unwire(m, 0); vm_page_free(m); } ! #if defined(I386_CPU) ! if (cpu_class <= CPUCLASS_386) ! invltlb(); #endif } --- 921,934 ---- oldpte = *(ptek + i); *(ptek + i) = 0; ! #ifndef I386_CPU ! invlpg((vm_offset_t) p->p_addr + i * PAGE_SIZE); ! #endif vm_page_unwire(m, 0); vm_page_free(m); } ! #ifdef I386_CPU ! invltlb(); #endif } *************** *** 2775,2789 **** *(int *) CMAP1 = PG_V | (src & PG_FRAME) | PG_A; *(int *) CMAP2 = PG_V | PG_RW | (dst & PG_FRAME) | PG_A | PG_M; ! #if defined(I386_CPU) ! if (cpu_class == CPUCLASS_386) { ! invltlb(); ! } else #endif - { - invlpg((u_int)CADDR1); - invlpg((u_int)CADDR2); - } bcopy(CADDR1, CADDR2, PAGE_SIZE); --- 2779,2790 ---- *(int *) CMAP1 = PG_V | (src & PG_FRAME) | PG_A; *(int *) CMAP2 = PG_V | PG_RW | (dst & PG_FRAME) | PG_A | PG_M; ! #ifdef I386_CPU ! invltlb(); ! #else ! invlpg((u_int)CADDR1); ! invlpg((u_int)CADDR2); #endif bcopy(CADDR1, CADDR2, PAGE_SIZE); Index: i386/i386/support.s =================================================================== RCS file: /home/ncvs/src/sys/i386/i386/support.s,v retrieving revision 1.77 diff -c -r1.77 support.s *** i386/i386/support.s 2001/01/06 17:40:03 1.77 --- i386/i386/support.s 2001/01/16 02:15:37 *************** *** 89,95 **** popl %edi ret ! #if defined(I486_CPU) ENTRY(i486_bzero) movl 4(%esp),%edx movl 8(%esp),%ecx --- 89,95 ---- popl %edi ret ! #ifdef I486_CPU ENTRY(i486_bzero) movl 4(%esp),%edx movl 8(%esp),%ecx *************** *** 703,714 **** cmpl $VM_MAXUSER_ADDRESS,%eax ja copyout_fault ! #if defined(I386_CPU) - #if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU) - cmpl $CPUCLASS_386,_cpu_class - jne 3f - #endif /* * We have to check each PTE for user write permission. * The checking may cause a page fault, so it is important to set --- 703,710 ---- cmpl $VM_MAXUSER_ADDRESS,%eax ja copyout_fault ! #ifdef I386_CPU /* * We have to check each PTE for user write permission. * The checking may cause a page fault, so it is important to set *************** *** 760,766 **** #endif /* I386_CPU */ /* bcopy(%esi, %edi, %ebx) */ - 3: movl %ebx,%ecx #if defined(I586_CPU) && NNPX > 0 --- 756,761 ---- *************** *** 1207,1219 **** movl $fusufault,PCB_ONFAULT(%ecx) movl 4(%esp),%edx ! #if defined(I386_CPU) - #if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU) - cmpl $CPUCLASS_386,_cpu_class - jne 2f /* we only have to set the right segment selector */ - #endif /* I486_CPU || I586_CPU || I686_CPU */ - /* XXX - page boundary crossing is still not handled */ movl %edx,%eax shrl $IDXSHIFT,%edx --- 1202,1209 ---- movl $fusufault,PCB_ONFAULT(%ecx) movl 4(%esp),%edx ! #ifdef I386_CPU /* XXX - page boundary crossing is still not handled */ movl %edx,%eax shrl $IDXSHIFT,%edx *************** *** 1240,1246 **** movl 4(%esp),%edx #endif - 2: cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */ ja fusufault --- 1230,1235 ---- *************** *** 1259,1271 **** movl $fusufault,PCB_ONFAULT(%ecx) movl 4(%esp),%edx ! #if defined(I386_CPU) - #if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU) - cmpl $CPUCLASS_386,_cpu_class - jne 2f - #endif /* I486_CPU || I586_CPU || I686_CPU */ - /* XXX - page boundary crossing is still not handled */ movl %edx,%eax shrl $IDXSHIFT,%edx --- 1248,1255 ---- movl $fusufault,PCB_ONFAULT(%ecx) movl 4(%esp),%edx ! #ifdef I386_CPU /* XXX - page boundary crossing is still not handled */ movl %edx,%eax shrl $IDXSHIFT,%edx *************** *** 1292,1298 **** movl 4(%esp),%edx #endif - 2: cmpl $VM_MAXUSER_ADDRESS-2,%edx /* verify address validity */ ja fusufault --- 1276,1281 ---- *************** *** 1312,1324 **** movl $fusufault,PCB_ONFAULT(%ecx) movl 4(%esp),%edx ! #if defined(I386_CPU) - #if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU) - cmpl $CPUCLASS_386,_cpu_class - jne 2f - #endif /* I486_CPU || I586_CPU || I686_CPU */ - movl %edx,%eax shrl $IDXSHIFT,%edx andb $0xfc,%dl --- 1295,1302 ---- movl $fusufault,PCB_ONFAULT(%ecx) movl 4(%esp),%edx ! #ifdef I386_CPU movl %edx,%eax shrl $IDXSHIFT,%edx andb $0xfc,%dl *************** *** 1344,1350 **** movl 4(%esp),%edx #endif - 2: cmpl $VM_MAXUSER_ADDRESS-1,%edx /* verify address validity */ ja fusufault --- 1322,1327 ---- *************** *** 1586,1592 **** /* void load_cr3(caddr_t cr3) */ ENTRY(load_cr3) ! #if defined(SWTCH_OPTIM_STATS) incl _tlb_flush_count #endif movl 4(%esp),%eax --- 1563,1569 ---- /* void load_cr3(caddr_t cr3) */ ENTRY(load_cr3) ! #ifdef SWTCH_OPTIM_STATS incl _tlb_flush_count #endif movl 4(%esp),%eax Index: i386/include/atomic.h =================================================================== RCS file: /home/ncvs/src/sys/i386/include/atomic.h,v retrieving revision 1.18 diff -c -r1.18 atomic.h *** i386/include/atomic.h 2001/01/16 00:18:36 1.18 --- i386/include/atomic.h 2001/01/16 04:16:07 *************** *** 153,164 **** } #endif /* defined(I386_CPU) */ ! #if defined(I386_CPU) /* * We assume that a = b will do atomic loads and stores. * ! * XXX: This is _NOT_ safe on a P6 or higher because it does not guarantee ! * memory ordering. These should only be used on a 386. */ #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ static __inline u_##TYPE \ --- 153,165 ---- } #endif /* defined(I386_CPU) */ ! #if defined(I386_CPU) || !defined(SMP) /* * We assume that a = b will do atomic loads and stores. * ! * XXX: This is _NOT_ safe on a P6 or higher under SMP ! * because it does not guarantee memory ordering. ! * These should only be used on a 386 or uni-processor. */ #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ static __inline u_##TYPE \ Index: pc98/conf/GENERIC =================================================================== RCS file: /home/ncvs/src/sys/pc98/conf/GENERIC,v retrieving revision 1.166 diff -c -r1.166 GENERIC *** pc98/conf/GENERIC 2001/01/14 17:50:14 1.166 --- pc98/conf/GENERIC 2001/01/16 03:59:16 *************** *** 18,24 **** # $FreeBSD: src/sys/pc98/conf/GENERIC,v 1.166 2001/01/14 17:50:14 markm Exp $ machine pc98 ! cpu I386_CPU cpu I486_CPU cpu I586_CPU cpu I686_CPU --- 18,24 ---- # $FreeBSD: src/sys/pc98/conf/GENERIC,v 1.166 2001/01/14 17:50:14 markm Exp $ machine pc98 ! #cpu I386_CPU #Do not enable with other cpu types cpu I486_CPU cpu I586_CPU cpu I686_CPU Index: pc98/i386/machdep.c =================================================================== RCS file: /home/ncvs/src/sys/pc98/i386/machdep.c,v retrieving revision 1.195 diff -c -r1.195 machdep.c *** pc98/i386/machdep.c 2001/01/12 13:39:50 1.195 --- pc98/i386/machdep.c 2001/01/16 03:57:52 *************** *** 1132,1141 **** cr0 = rcr0(); cr0 |= CR0_NE; /* Done by npxinit() */ cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ ! #ifdef I386_CPU ! if (cpu_class != CPUCLASS_386) #endif - cr0 |= CR0_WP | CR0_AM; load_cr0(cr0); load_gs(_udatasel); } --- 1132,1140 ---- cr0 = rcr0(); cr0 |= CR0_NE; /* Done by npxinit() */ cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ ! #ifndef I386_CPU ! cr0 |= CR0_WP | CR0_AM; #endif load_cr0(cr0); load_gs(_udatasel); }