Index: ata_macio.c
===================================================================
--- ata_macio.c	(revision 189173)
+++ ata_macio.c	(working copy)
@@ -203,7 +203,6 @@
 ata_macio_attach(device_t dev)
 {
 	struct ata_macio_softc *sc = device_get_softc(dev);
-	uint32_t timingreg;
 
 #if USE_DBDMA_IRQ
 	int dbdma_irq_rid = 1;
@@ -219,18 +218,19 @@
 
 	ata_dbdma_dmainit(dev);
 
-	/* Configure initial timings */
-	timingreg = bus_read_4(sc->sc_mem, ATA_MACIO_TIMINGREG);
+	/* Configure initial timings: PIO0, WDMA0 */
+	sc->udmaconf[0] = sc->udmaconf[1] = 0;
 	if (sc->rev == 4) {
-		sc->udmaconf[0] = sc->udmaconf[1] = timingreg & 0x1ff00000;
-		sc->wdmaconf[0] = sc->wdmaconf[1] = timingreg & 0x001ffc00;
-		sc->pioconf[0]  = sc->pioconf[1]  = timingreg & 0x000003ff;
+		sc->wdmaconf[0] = sc->wdmaconf[1] = 0x00084000;
+		sc->pioconf[0]  = sc->pioconf[1]  = 0x0000038c;
 	} else {
-		sc->udmaconf[0] = sc->udmaconf[1] = 0;
-		sc->wdmaconf[0] = sc->wdmaconf[1] = timingreg & 0xfffff800;
-		sc->pioconf[0]  = sc->pioconf[1]  = timingreg & 0x000007ff;
+		sc->wdmaconf[0] = sc->wdmaconf[1] = 0x00084000;
+		sc->pioconf[0]  = sc->pioconf[1]  = 0x00000526;
 	}
 
+	bus_write_4(sc->sc_mem, ATA_MACIO_TIMINGREG, 
+	    sc->wdmaconf[0] | sc->pioconf[0]);
+
 #if USE_DBDMA_IRQ
 	/* Bind to DBDMA interrupt as well */
 
Index: ata_kauai.c
===================================================================
--- ata_kauai.c	(revision 189173)
+++ ata_kauai.c	(working copy)
@@ -291,12 +291,20 @@
 	}
 #endif
 
-	/* Set up initial mode */
-	sc->pioconf[0] = sc->pioconf[1] = 
-	    bus_read_4(sc->sc_memr, PIO_CONFIG_REG) & 0x0f000fff;
+	/* Set up initial mode: PIO0, UDMA5, WDMA0 */
+	if (sc->shasta) {
+		sc->pioconf[0] = sc->pioconf[1] = pio_timing_shasta[0]; 
+		sc->wdmaconf[0] = sc->wdmaconf[1] = dma_timing_shasta[0]; 
+		sc->udmaconf[0] = sc->udmaconf[1] = udma_timing_shasta[5]; 
+	} else {
+		sc->pioconf[0] = sc->pioconf[1] = pio_timing_kauai[0]; 
+		sc->wdmaconf[0] = sc->wdmaconf[1] = dma_timing_kauai[0]; 
+		sc->udmaconf[0] = sc->udmaconf[1] = udma_timing_kauai[5]; 
+	}
 
-	sc->udmaconf[0] = sc->udmaconf[1] = 0;
-	sc->wdmaconf[0] = sc->wdmaconf[1] = 0;
+	bus_write_4(sc->sc_memr, UDMA_CONFIG_REG, sc->udmaconf[0]);
+	bus_write_4(sc->sc_memr, PIO_CONFIG_REG, 
+	    sc->wdmaconf[0] | sc->pioconf[0]);
 
 	/* Magic FCR value from Apple */
 	bus_write_4(sc->sc_memr, 0, 0x00000007);