diff -r aaa350b203ba sys/dev/cxgbe/t4_netmap.c
--- a/sys/dev/cxgbe/t4_netmap.c	Tue Feb 24 22:27:02 2015 +0000
+++ b/sys/dev/cxgbe/t4_netmap.c	Wed Feb 25 01:04:40 2015 -0800
@@ -903,6 +903,9 @@ cxgbe_netmap_rxsync(struct netmap_kring 
 	u_int const head = nm_rxsync_prologue(kring);
 	u_int n;
 	int force_update = (flags & NAF_FORCE_READ) || kring->nr_kflags & NKR_PENDINTR;
+#ifdef KTR
+	u_int k1 = kring->nr_hwtail;
+#endif
 
 	if (netmap_no_pendintr || force_update) {
 		kring->nr_hwtail = atomic_load_acq_32(&nm_rxq->fl_cidx);
@@ -912,6 +915,9 @@ cxgbe_netmap_rxsync(struct netmap_kring 
 	/* Userspace done with buffers from kring->nr_hwcur to head */
 	n = head >= kring->nr_hwcur ? head - kring->nr_hwcur :
 	    kring->nkr_num_slots - kring->nr_hwcur + head;
+	CTR5(KTR_CXGBE, "%s: rxb_new_seen %u (%u - %u), rxb_read %u", __func__,
+	    IDXDIFF(kring->nr_hwtail, k1, kring->nkr_num_slots), k1,
+	    kring->nr_hwtail, n);
 	n &= ~7U;
 	if (n > 0) {
 		u_int fl_pidx = nm_rxq->fl_pidx;
@@ -1111,6 +1117,10 @@ t4_nm_intr(void *arg)
 	int processed = 0;
 	uint8_t opcode;
 	uint32_t fl_cidx = atomic_load_acq_32(&nm_rxq->fl_cidx);
+#ifdef KTR
+	u_int k1 = 0;
+	u_int k2 = fl_cidx;
+#endif
 
 	while ((d->rsp.u.type_gen & F_RSPD_GEN) == nm_rxq->iq_gen) {
 
@@ -1169,12 +1179,17 @@ t4_nm_intr(void *arg)
 			    V_CIDXINC(n) | V_INGRESSQID(nm_rxq->iq_cntxt_id) |
 			    V_SEINTARM(V_QINTR_TIMER_IDX(X_TIMERREG_UPDATE_CIDX)));
 			n = 0;
+#ifdef KTR
+			k1++;
+#endif
 		}
 	}
 	if (fl_cidx != nm_rxq->fl_cidx) {
 		atomic_store_rel_32(&nm_rxq->fl_cidx, fl_cidx);
 		netmap_rx_irq(ifp, nm_rxq->nid, &processed);
 	}
+	CTR6(KTR_CXGBE, "%s: iq_update %u x 64, rxb_new %u (%u-%u), iq_arm %u",
+	    __func__, k1, IDXDIFF(fl_cidx, k2, nm_rxq->fl_sidx), k2, fl_cidx, n);
 	t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_CIDXINC(n) |
 	    V_INGRESSQID((u32)nm_rxq->iq_cntxt_id) |
 	    V_SEINTARM(V_QINTR_TIMER_IDX(1)));