/dts-v1/;

/memreserve/ 0xb00000 0x10000;

/  {

	interrupt-parent = <0x1>;
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	compatible = "pine64,quartz64-a", "rockchip,rk3566";
	model = "Pine64 RK3566 Quartz64-A Board";
	fit-images {

		optee {

			os = "op-tee";
			type = "firmware";
			size = <0x6d980>;
			load-addr = <0x8400000>;
		};
		atf-5 {

			os = "arm-trusted-firmware";
			type = "firmware";
			size = <0x1df4>;
			load-addr = <0x66000>;
		};
		atf-4 {

			os = "arm-trusted-firmware";
			type = "firmware";
			size = <0x2000>;
			load-addr = <0xfdcc9000>;
		};
		atf-3 {

			os = "arm-trusted-firmware";
			type = "firmware";
			size = <0x2000>;
			load-addr = <0xfdcd0000>;
		};
		atf-2 {

			os = "arm-trusted-firmware";
			type = "firmware";
			size = <0x4c4b>;
			load-addr = <0x68000>;
		};
		uboot {

			os = "U-Boot";
			type = "standalone";
			size = <0x100000>;
			load-addr = <0xa00000>;
		};
	};
	aliases {

		gpio0 = "/pinctrl/gpio@fdd60000";
		gpio1 = "/pinctrl/gpio@fe740000";
		gpio2 = "/pinctrl/gpio@fe750000";
		gpio3 = "/pinctrl/gpio@fe760000";
		gpio4 = "/pinctrl/gpio@fe770000";
		i2c0 = "/i2c@fdd40000";
		i2c1 = "/i2c@fe5a0000";
		i2c2 = "/i2c@fe5b0000";
		i2c3 = "/i2c@fe5c0000";
		i2c4 = "/i2c@fe5d0000";
		i2c5 = "/i2c@fe5e0000";
		serial0 = "/serial@fdd50000";
		serial1 = "/serial@fe650000";
		serial2 = "/serial@fe660000";
		serial3 = "/serial@fe670000";
		serial4 = "/serial@fe680000";
		serial5 = "/serial@fe690000";
		serial6 = "/serial@fe6a0000";
		serial7 = "/serial@fe6b0000";
		serial8 = "/serial@fe6c0000";
		serial9 = "/serial@fe6d0000";
		spi0 = "/spi@fe610000";
		spi1 = "/spi@fe620000";
		spi2 = "/spi@fe630000";
		spi3 = "/spi@fe640000";
		ethernet0 = "/ethernet@fe010000";
		mmc0 = "/mmc@fe2b0000";
		mmc1 = "/mmc@fe310000";
	};
	cpus {

		#address-cells = <0x2>;
		#size-cells = <0x0>;
		cpu@0 {

			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x0>;
			clocks = <0x2 0x0>;
			#cooling-cells = <0x2>;
			enable-method = "psci";
			operating-points-v2 = <0x3>;
			cpu-supply = <0x4>;
			phandle = <0x9>;
		};
		cpu@100 {

			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x100>;
			#cooling-cells = <0x2>;
			enable-method = "psci";
			operating-points-v2 = <0x3>;
			cpu-supply = <0x4>;
			phandle = <0xa>;
		};
		cpu@200 {

			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x200>;
			#cooling-cells = <0x2>;
			enable-method = "psci";
			operating-points-v2 = <0x3>;
			cpu-supply = <0x4>;
			phandle = <0xb>;
		};
		cpu@300 {

			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x300>;
			#cooling-cells = <0x2>;
			enable-method = "psci";
			operating-points-v2 = <0x3>;
			cpu-supply = <0x4>;
			phandle = <0xc>;
		};
	};
	opp-table-0 {

		compatible = "operating-points-v2";
		opp-shared;
		phandle = <0x3>;
		opp-408000000 {

			opp-hz = <0x0 0x18519600>;
			opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
			clock-latency-ns = <0x9c40>;
		};
		opp-600000000 {

			opp-hz = <0x0 0x23c34600>;
			opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
		};
		opp-816000000 {

			opp-hz = <0x0 0x30a32c00>;
			opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
			opp-suspend;
		};
		opp-1104000000 {

			opp-hz = <0x0 0x41cdb400>;
			opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
		};
		opp-1416000000 {

			opp-hz = <0x0 0x54667200>;
			opp-microvolt = <0xdbba0 0xdbba0 0x118c30>;
		};
		opp-1608000000 {

			opp-hz = <0x0 0x5fd82200>;
			opp-microvolt = <0xee098 0xee098 0x118c30>;
		};
		opp-1800000000 {

			opp-hz = <0x0 0x6b49d200>;
			opp-microvolt = <0x100590 0x100590 0x118c30>;
		};
	};
	display-subsystem {

		compatible = "rockchip,display-subsystem";
		ports = <0x5>;
	};
	firmware {

		scmi {

			compatible = "arm,scmi-smc";
			arm,smc-id = <0x82000010>;
			shmem = <0x6>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			protocol@14 {

				reg = <0x14>;
				#clock-cells = <0x1>;
				phandle = <0x2>;
			};
		};
	};
	opp-table-1 {

		compatible = "operating-points-v2";
		phandle = <0x43>;
		opp-200000000 {

			opp-hz = <0x0 0xbebc200>;
			opp-microvolt = <0xc96a8>;
		};
		opp-300000000 {

			opp-hz = <0x0 0x11e1a300>;
			opp-microvolt = <0xc96a8>;
		};
		opp-400000000 {

			opp-hz = <0x0 0x17d78400>;
			opp-microvolt = <0xc96a8>;
		};
		opp-600000000 {

			opp-hz = <0x0 0x23c34600>;
			opp-microvolt = <0xc96a8>;
		};
		opp-700000000 {

			opp-hz = <0x0 0x29b92700>;
			opp-microvolt = <0xdbba0>;
		};
		opp-800000000 {

			opp-hz = <0x0 0x2faf0800>;
			opp-microvolt = <0xf4240>;
		};
	};
	hdmi-sound {

		compatible = "simple-audio-card";
		simple-audio-card,name = "HDMI";
		simple-audio-card,format = "i2s";
		simple-audio-card,mclk-fs = <0x100>;
		status = "okay";
		simple-audio-card,codec {

			sound-dai = <0x7>;
		};
		simple-audio-card,cpu {

			sound-dai = <0x8>;
		};
	};
	pmu {

		compatible = "arm,cortex-a55-pmu";
		interrupts = <0x0 0xe4 0x4 0x0 0xe5 0x4 0x0 0xe6 0x4 0x0 0xe7 0x4>;
		interrupt-affinity = <0x9 0xa 0xb 0xc>;
	};
	psci {

		compatible = "arm,psci-1.0";
		method = "smc";
	};
	timer {

		compatible = "arm,armv8-timer";
		interrupts = <0x1 0xd 0x4 0x1 0xe 0x4 0x1 0xb 0x4 0x1 0xa 0x4>;
		arm,no-tick-in-suspend;
	};
	xin24m {

		compatible = "fixed-clock";
		clock-frequency = <0x16e3600>;
		clock-output-names = "xin24m";
		#clock-cells = <0x0>;
		phandle = <0x1d>;
	};
	xin32k {

		compatible = "fixed-clock";
		clock-frequency = <0x8000>;
		clock-output-names = "xin32k";
		pinctrl-0 = <0xd>;
		pinctrl-names = "default";
		#clock-cells = <0x0>;
	};
	sram@10f000 {

		compatible = "mmio-sram";
		reg = <0x0 0x10f000 0x0 0x100>;
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges = <0x0 0x0 0x10f000 0x100>;
		sram@0 {

			compatible = "arm,scmi-shmem";
			reg = <0x0 0x100>;
			phandle = <0x6>;
		};
	};
	sata@fc400000 {

		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
		reg = <0x0 0xfc400000 0x0 0x1000>;
		clocks = <0xe 0x9b 0xe 0x9c 0xe 0x9d>;
		clock-names = "sata", "pmalive", "rxoob";
		interrupts = <0x0 0x5f 0x4>;
		phys = <0xf 0x1>;
		phy-names = "sata-phy";
		ports-implemented = <0x1>;
		power-domains = <0x10 0xf>;
		status = "disabled";
	};
	sata@fc800000 {

		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
		reg = <0x0 0xfc800000 0x0 0x1000>;
		clocks = <0xe 0xa0 0xe 0xa1 0xe 0xa2>;
		clock-names = "sata", "pmalive", "rxoob";
		interrupts = <0x0 0x60 0x4>;
		phys = <0x11 0x1>;
		phy-names = "sata-phy";
		ports-implemented = <0x1>;
		power-domains = <0x10 0xf>;
		status = "disabled";
	};
	usb@fcc00000 {

		compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
		reg = <0x0 0xfcc00000 0x0 0x400000>;
		interrupts = <0x0 0xa9 0x4>;
		clocks = <0xe 0xa6 0xe 0xa7 0xe 0xa5>;
		clock-names = "ref_clk", "suspend_clk", "bus_clk";
		dr_mode = "host";
		phy_type = "utmi_wide";
		power-domains = <0x10 0xf>;
		resets = <0xe 0x94>;
		snps,dis_u2_susphy_quirk;
		status = "okay";
		phys = <0x12>;
		phy-names = "usb2-phy";
		extcon = <0x13>;
		maximum-speed = "high-speed";
	};
	usb@fd000000 {

		compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
		reg = <0x0 0xfd000000 0x0 0x400000>;
		interrupts = <0x0 0xaa 0x4>;
		clocks = <0xe 0xa9 0xe 0xaa 0xe 0xa8>;
		clock-names = "ref_clk", "suspend_clk", "bus_clk";
		dr_mode = "host";
		phys = <0x14 0xf 0x4>;
		phy-names = "usb2-phy", "usb3-phy";
		phy_type = "utmi_wide";
		power-domains = <0x10 0xf>;
		resets = <0xe 0x95>;
		snps,dis_u2_susphy_quirk;
		status = "okay";
	};
	interrupt-controller@fd400000 {

		compatible = "arm,gic-v3";
		reg = <0x0 0xfd400000 0x0 0x10000 0x0 0xfd460000 0x0 0x80000>;
		interrupts = <0x1 0x9 0x4>;
		interrupt-controller;
		#interrupt-cells = <0x3>;
		mbi-alias = <0x0 0xfd410000>;
		mbi-ranges = <0x128 0x18>;
		msi-controller;
		phandle = <0x1>;
	};
	usb@fd800000 {

		compatible = "generic-ehci";
		reg = <0x0 0xfd800000 0x0 0x40000>;
		interrupts = <0x0 0x82 0x4>;
		clocks = <0xe 0xbd 0xe 0xbe 0xe 0xbc>;
		phys = <0x15>;
		phy-names = "usb";
		status = "okay";
	};
	usb@fd840000 {

		compatible = "generic-ohci";
		reg = <0x0 0xfd840000 0x0 0x40000>;
		interrupts = <0x0 0x83 0x4>;
		clocks = <0xe 0xbd 0xe 0xbe 0xe 0xbc>;
		phys = <0x15>;
		phy-names = "usb";
		status = "okay";
	};
	usb@fd880000 {

		compatible = "generic-ehci";
		reg = <0x0 0xfd880000 0x0 0x40000>;
		interrupts = <0x0 0x85 0x4>;
		clocks = <0xe 0xbf 0xe 0xc0 0xe 0xbc>;
		phys = <0x16>;
		phy-names = "usb";
		status = "okay";
	};
	usb@fd8c0000 {

		compatible = "generic-ohci";
		reg = <0x0 0xfd8c0000 0x0 0x40000>;
		interrupts = <0x0 0x86 0x4>;
		clocks = <0xe 0xbf 0xe 0xc0 0xe 0xbc>;
		phys = <0x16>;
		phy-names = "usb";
		status = "okay";
	};
	syscon@fdc20000 {

		compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd";
		reg = <0x0 0xfdc20000 0x0 0x10000>;
		phandle = <0xb2>;
		io-domains {

			compatible = "rockchip,rk3568-pmu-io-voltage-domain";
			status = "okay";
			pmuio1-supply = <0x17>;
			pmuio2-supply = <0x17>;
			vccio1-supply = <0x18>;
			vccio2-supply = <0x19>;
			vccio3-supply = <0x1a>;
			vccio4-supply = <0x19>;
			vccio5-supply = <0x1b>;
			vccio6-supply = <0x1c>;
			vccio7-supply = <0x1b>;
		};
	};
	syscon@fdc50000 {

		reg = <0x0 0xfdc50000 0x0 0x1000>;
		compatible = "rockchip,rk3566-pipe-grf", "syscon";
		phandle = <0xab>;
	};
	syscon@fdc60000 {

		compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd";
		reg = <0x0 0xfdc60000 0x0 0x10000>;
		phandle = <0x1f>;
	};
	syscon@fdc80000 {

		compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
		reg = <0x0 0xfdc80000 0x0 0x1000>;
		phandle = <0xac>;
	};
	syscon@fdc90000 {

		compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
		reg = <0x0 0xfdc90000 0x0 0x1000>;
		phandle = <0xad>;
	};
	syscon@fdca0000 {

		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca0000 0x0 0x8000>;
		phandle = <0xae>;
	};
	syscon@fdca8000 {

		compatible = "rockchip,rk3568-usb2phy-grf", "syscon";
		reg = <0x0 0xfdca8000 0x0 0x8000>;
		phandle = <0xb1>;
	};
	clock-controller@fdd00000 {

		compatible = "rockchip,rk3568-pmucru";
		reg = <0x0 0xfdd00000 0x0 0x1000>;
		#clock-cells = <0x1>;
		#reset-cells = <0x1>;
		phandle = <0x1e>;
	};
	clock-controller@fdd20000 {

		compatible = "rockchip,rk3568-cru";
		reg = <0x0 0xfdd20000 0x0 0x1000>;
		clocks = <0x1d>;
		clock-names = "xin24m";
		#clock-cells = <0x1>;
		#reset-cells = <0x1>;
		assigned-clocks = <0xe 0x4 0x1e 0x1>;
		assigned-clock-rates = <0x47868c00 0xbebc200>;
		rockchip,grf = <0x1f>;
		phandle = <0xe>;
	};
	i2c@fdd40000 {

		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
		reg = <0x0 0xfdd40000 0x0 0x1000>;
		interrupts = <0x0 0x2e 0x4>;
		clocks = <0x1e 0x7 0x1e 0x2d>;
		clock-names = "i2c", "pclk";
		pinctrl-0 = <0x20>;
		pinctrl-names = "default";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "okay";
		regulator@1c {

			compatible = "tcs,tcs4525";
			reg = <0x1c>;
			fcs,suspend-voltage-selector = <0x1>;
			regulator-name = "vdd_cpu";
			regulator-min-microvolt = <0xc3500>;
			regulator-max-microvolt = <0x118c30>;
			regulator-ramp-delay = <0x8fc>;
			regulator-always-on;
			regulator-boot-on;
			vin-supply = <0x21>;
			phandle = <0x4>;
			regulator-state-mem {

				regulator-off-in-suspend;
			};
		};
		pmic@20 {

			compatible = "rockchip,rk817";
			reg = <0x20>;
			interrupt-parent = <0x22>;
			interrupts = <0x3 0x8>;
			assigned-clocks = <0xe 0x48>;
			assigned-clock-parents = <0xe 0x196>;
			clock-names = "mclk";
			clocks = <0xe 0x48>;
			clock-output-names = "rk808-clkout1", "rk808-clkout2";
			#clock-cells = <0x1>;
			pinctrl-names = "default";
			pinctrl-0 = <0x23 0x24>;
			rockchip,system-power-controller;
			#sound-dai-cells = <0x0>;
			wakeup-source;
			vcc1-supply = <0x21>;
			vcc2-supply = <0x21>;
			vcc3-supply = <0x21>;
			vcc4-supply = <0x21>;
			vcc5-supply = <0x21>;
			vcc6-supply = <0x21>;
			vcc7-supply = <0x21>;
			vcc8-supply = <0x21>;
			vcc9-supply = <0x25>;
			phandle = <0x89>;
			regulators {

				DCDC_REG1 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x7a120>;
					regulator-max-microvolt = <0x149970>;
					regulator-init-microvolt = <0xdbba0>;
					regulator-ramp-delay = <0x1771>;
					regulator-initial-mode = <0x2>;
					regulator-name = "vdd_logic";
					regulator-state-mem {

						regulator-on-in-suspend;
						regulator-suspend-microvolt = <0xdbba0>;
					};
				};
				DCDC_REG2 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x7a120>;
					regulator-max-microvolt = <0x149970>;
					regulator-init-microvolt = <0xdbba0>;
					regulator-ramp-delay = <0x1771>;
					regulator-initial-mode = <0x2>;
					regulator-name = "vdd_gpu";
					phandle = <0x44>;
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
				DCDC_REG3 {

					regulator-always-on;
					regulator-boot-on;
					regulator-initial-mode = <0x2>;
					regulator-name = "vcc_ddr";
					regulator-state-mem {

						regulator-on-in-suspend;
					};
				};
				DCDC_REG4 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x325aa0>;
					regulator-max-microvolt = <0x325aa0>;
					regulator-initial-mode = <0x2>;
					regulator-name = "vcc_3v3";
					phandle = <0x1b>;
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
				LDO_REG1 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-name = "vcca1v8_pmu";
					phandle = <0x8e>;
					regulator-state-mem {

						regulator-on-in-suspend;
						regulator-suspend-microvolt = <0x1b7740>;
					};
				};
				LDO_REG2 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0xdbba0>;
					regulator-max-microvolt = <0xdbba0>;
					regulator-name = "vdda_0v9";
					phandle = <0x59>;
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
				LDO_REG3 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0xdbba0>;
					regulator-max-microvolt = <0xdbba0>;
					regulator-name = "vdda0v9_pmu";
					regulator-state-mem {

						regulator-on-in-suspend;
						regulator-suspend-microvolt = <0xdbba0>;
					};
				};
				LDO_REG4 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x325aa0>;
					regulator-max-microvolt = <0x325aa0>;
					regulator-name = "vccio_acodec";
					phandle = <0x18>;
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
				LDO_REG5 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x325aa0>;
					regulator-name = "vccio_sd";
					phandle = <0x1a>;
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
				LDO_REG6 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x325aa0>;
					regulator-max-microvolt = <0x325aa0>;
					regulator-name = "vcc3v3_pmu";
					phandle = <0x17>;
					regulator-state-mem {

						regulator-on-in-suspend;
						regulator-suspend-microvolt = <0x325aa0>;
					};
				};
				LDO_REG7 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-name = "vcc_1v8";
					phandle = <0x19>;
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
				LDO_REG8 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-name = "vcc1v8_dvp";
					phandle = <0x1c>;
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
				LDO_REG9 {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x2ab980>;
					regulator-max-microvolt = <0x2ab980>;
					regulator-name = "vcc2v8_dvp";
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
				BOOST {

					regulator-always-on;
					regulator-boot-on;
					regulator-min-microvolt = <0x4c4b40>;
					regulator-max-microvolt = <0x4c4b40>;
					regulator-name = "boost";
					phandle = <0x25>;
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
				OTG_SWITCH {

					regulator-name = "otg_switch";
					regulator-state-mem {

						regulator-off-in-suspend;
					};
				};
			};
		};
	};
	serial@fdd50000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfdd50000 0x0 0x100>;
		interrupts = <0x0 0x74 0x4>;
		clocks = <0x1e 0xb 0x1e 0x2c>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0x0 0x26 0x1>;
		pinctrl-0 = <0x27>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "okay";
	};
	pwm@fdd70000 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfdd70000 0x0 0x10>;
		clocks = <0x1e 0xd 0x1e 0x30>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0x28>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fdd70010 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfdd70010 0x0 0x10>;
		clocks = <0x1e 0xd 0x1e 0x30>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0x29>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fdd70020 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfdd70020 0x0 0x10>;
		clocks = <0x1e 0xd 0x1e 0x30>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0x2a>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fdd70030 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfdd70030 0x0 0x10>;
		clocks = <0x1e 0xd 0x1e 0x30>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0x2b>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	power-management@fdd90000 {

		compatible = "rockchip,rk3568-pmu", "syscon", "simple-mfd";
		reg = <0x0 0xfdd90000 0x0 0x1000>;
		power-controller {

			compatible = "rockchip,rk3568-power-controller";
			#power-domain-cells = <0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x10>;
			power-domain@7 {

				reg = <0x7>;
				clocks = <0xe 0x19 0xe 0x1a>;
				pm_qos = <0x2c>;
				#power-domain-cells = <0x0>;
			};
			power-domain@8 {

				reg = <0x8>;
				clocks = <0xe 0xcc 0xe 0xcd>;
				pm_qos = <0x2d 0x2e 0x2f>;
				#power-domain-cells = <0x0>;
			};
			power-domain@9 {

				reg = <0x9>;
				clocks = <0xe 0xda 0xe 0xdb 0xe 0xdc>;
				pm_qos = <0x30 0x31 0x32>;
				#power-domain-cells = <0x0>;
			};
			power-domain@10 {

				reg = <0xa>;
				clocks = <0xe 0xf1 0xe 0xf2>;
				pm_qos = <0x33 0x34 0x35 0x36 0x37 0x38>;
				#power-domain-cells = <0x0>;
			};
			power-domain@11 {

				reg = <0xb>;
				clocks = <0xe 0xed>;
				pm_qos = <0x39>;
				#power-domain-cells = <0x0>;
			};
			power-domain@13 {

				clocks = <0xe 0x107>;
				reg = <0xd>;
				pm_qos = <0x3a>;
				#power-domain-cells = <0x0>;
			};
			power-domain@14 {

				reg = <0xe>;
				clocks = <0xe 0x102>;
				pm_qos = <0x3b 0x3c 0x3d>;
				#power-domain-cells = <0x0>;
			};
			power-domain@15 {

				reg = <0xf>;
				clocks = <0xe 0x7f>;
				pm_qos = <0x3e 0x3f 0x40 0x41 0x42>;
				#power-domain-cells = <0x0>;
			};
		};
	};
	gpu@fde60000 {

		compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
		reg = <0x0 0xfde60000 0x0 0x4000>;
		interrupts = <0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x27 0x4>;
		interrupt-names = "job", "mmu", "gpu";
		clocks = <0x2 0x1 0xe 0x1b>;
		clock-names = "gpu", "bus";
		#cooling-cells = <0x2>;
		operating-points-v2 = <0x43>;
		power-domains = <0x10 0x7>;
		status = "okay";
		mali-supply = <0x44>;
		phandle = <0x9c>;
	};
	video-codec@fdea0400 {

		compatible = "rockchip,rk3568-vpu";
		reg = <0x0 0xfdea0000 0x0 0x800>;
		interrupts = <0x0 0x8b 0x4>;
		clocks = <0xe 0xee 0xe 0xef>;
		clock-names = "aclk", "hclk";
		iommus = <0x45>;
		power-domains = <0x10 0xb>;
	};
	iommu@fdea0800 {

		compatible = "rockchip,rk3568-iommu";
		reg = <0x0 0xfdea0800 0x0 0x40>;
		interrupts = <0x0 0x8a 0x4>;
		clock-names = "aclk", "iface";
		clocks = <0xe 0xee 0xe 0xef>;
		power-domains = <0x10 0xb>;
		#iommu-cells = <0x0>;
		phandle = <0x45>;
	};
	video-codec@fdee0000 {

		compatible = "rockchip,rk3568-vepu";
		reg = <0x0 0xfdee0000 0x0 0x800>;
		interrupts = <0x0 0x40 0x4>;
		clocks = <0xe 0xfd 0xe 0xfe>;
		clock-names = "aclk", "hclk";
		iommus = <0x46>;
		power-domains = <0x10 0xa>;
	};
	iommu@fdee0800 {

		compatible = "rockchip,rk3568-iommu";
		reg = <0x0 0xfdee0800 0x0 0x40>;
		interrupts = <0x0 0x3f 0x4>;
		clocks = <0xe 0xfd 0xe 0xfe>;
		clock-names = "aclk", "iface";
		power-domains = <0x10 0xa>;
		#iommu-cells = <0x0>;
		phandle = <0x46>;
	};
	mmc@fe000000 {

		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
		reg = <0x0 0xfe000000 0x0 0x4000>;
		interrupts = <0x0 0x64 0x4>;
		clocks = <0xe 0xc1 0xe 0xc2 0xe 0x18e 0xe 0x18f>;
		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
		fifo-depth = <0x100>;
		max-frequency = <0x8f0d180>;
		resets = <0xe 0xeb>;
		reset-names = "reset";
		status = "disabled";
	};
	ethernet@fe010000 {

		compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
		reg = <0x0 0xfe010000 0x0 0x10000>;
		interrupts = <0x0 0x20 0x4 0x0 0x1d 0x4>;
		interrupt-names = "macirq", "eth_wake_irq";
		clocks = <0xe 0x186 0xe 0x189 0xe 0x189 0xe 0xc7 0xe 0xc3 0xe 0xc4 0xe 0x189 0xe 0xc8>;
		clock-names = "stmmaceth", "mac_clk_rx", "mac_clk_tx", "clk_mac_refout", "aclk_mac", "pclk_mac", "clk_mac_speed", "ptp_ref";
		resets = <0xe 0xec>;
		reset-names = "stmmaceth";
		rockchip,grf = <0x1f>;
		snps,axi-config = <0x47>;
		snps,mixed-burst;
		snps,mtl-rx-config = <0x48>;
		snps,mtl-tx-config = <0x49>;
		snps,tso;
		status = "okay";
		assigned-clocks = <0xe 0x189 0xe 0x187 0xe 0x186>;
		assigned-clock-parents = <0xe 0x187 0xe 0x186 0x4a>;
		clock_in_out = "input";
		phy-supply = <0x1b>;
		phy-mode = "rgmii";
		pinctrl-names = "default";
		pinctrl-0 = <0x4b 0x4c 0x4d 0x4e 0x4f 0x50>;
		snps,reset-gpio = <0x22 0x13 0x1>;
		snps,reset-active-low;
		snps,reset-delays-us = <0x0 0x4e20 0x186a0>;
		tx_delay = <0x30>;
		rx_delay = <0x10>;
		phy-handle = <0x51>;
		mdio {

			compatible = "snps,dwmac-mdio";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ethernet-phy@0 {

				compatible = "ethernet-phy-ieee802.3-c22";
				reg = <0x0>;
				phandle = <0x51>;
			};
		};
		stmmac-axi-config {

			snps,blen = <0x0 0x0 0x0 0x0 0x10 0x8 0x4>;
			snps,rd_osr_lmt = <0x8>;
			snps,wr_osr_lmt = <0x4>;
			phandle = <0x47>;
		};
		rx-queues-config {

			snps,rx-queues-to-use = <0x1>;
			phandle = <0x48>;
			queue0 {

			};
		};
		tx-queues-config {

			snps,tx-queues-to-use = <0x1>;
			phandle = <0x49>;
			queue0 {

			};
		};
	};
	vop@fe040000 {

		reg = <0x0 0xfe040000 0x0 0x3000 0x0 0xfe044000 0x0 0x1000>;
		reg-names = "vop", "gamma-lut";
		interrupts = <0x0 0x94 0x4>;
		clocks = <0xe 0xdd 0xe 0xde 0xe 0xdf 0xe 0xe0 0xe 0xe1>;
		clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2";
		iommus = <0x52>;
		power-domains = <0x10 0x9>;
		rockchip,grf = <0x1f>;
		status = "okay";
		compatible = "rockchip,rk3566-vop";
		assigned-clocks = <0xe 0xdf 0xe 0xe0>;
		assigned-clock-parents = <0x1e 0x2 0xe 0x5>;
		ports {

			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phandle = <0x5>;
			port@0 {

				reg = <0x0>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				endpoint@2 {

					reg = <0x2>;
					remote-endpoint = <0x53>;
					phandle = <0x5a>;
				};
			};
			port@1 {

				reg = <0x1>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;
			};
			port@2 {

				reg = <0x2>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;
			};
		};
	};
	iommu@fe043e00 {

		compatible = "rockchip,rk3568-iommu";
		reg = <0x0 0xfe043e00 0x0 0x100 0x0 0xfe043f00 0x0 0x100>;
		interrupts = <0x0 0x94 0x4>;
		clocks = <0xe 0xdd 0xe 0xde>;
		clock-names = "aclk", "iface";
		#iommu-cells = <0x0>;
		status = "okay";
		phandle = <0x52>;
	};
	dsi@fe060000 {

		compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi";
		reg = <0x0 0xfe060000 0x0 0x10000>;
		interrupts = <0x0 0x44 0x4>;
		clock-names = "pclk", "hclk";
		clocks = <0xe 0xe8 0xe 0xda>;
		phy-names = "dphy";
		phys = <0x54>;
		power-domains = <0x10 0x9>;
		reset-names = "apb";
		resets = <0xe 0x110>;
		rockchip,grf = <0x1f>;
		status = "disabled";
		ports {

			#address-cells = <0x1>;
			#size-cells = <0x0>;
			port@0 {

				reg = <0x0>;
			};
			port@1 {

				reg = <0x1>;
			};
		};
	};
	dsi@fe070000 {

		compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi";
		reg = <0x0 0xfe070000 0x0 0x10000>;
		interrupts = <0x0 0x45 0x4>;
		clock-names = "pclk", "hclk";
		clocks = <0xe 0xe9 0xe 0xda>;
		phy-names = "dphy";
		phys = <0x55>;
		power-domains = <0x10 0x9>;
		reset-names = "apb";
		resets = <0xe 0x111>;
		rockchip,grf = <0x1f>;
		status = "disabled";
		ports {

			#address-cells = <0x1>;
			#size-cells = <0x0>;
			port@0 {

				reg = <0x0>;
			};
			port@1 {

				reg = <0x1>;
			};
		};
	};
	hdmi@fe0a0000 {

		compatible = "rockchip,rk3568-dw-hdmi";
		reg = <0x0 0xfe0a0000 0x0 0x20000>;
		interrupts = <0x0 0x2d 0x4>;
		clocks = <0xe 0xe6 0xe 0xe7 0xe 0x193 0x1e 0x28 0xe 0xda>;
		clock-names = "iahb", "isfr", "cec", "ref";
		pinctrl-names = "default";
		pinctrl-0 = <0x56 0x57 0x58>;
		power-domains = <0x10 0x9>;
		reg-io-width = <0x4>;
		rockchip,grf = <0x1f>;
		#sound-dai-cells = <0x0>;
		status = "okay";
		avdd-0v9-supply = <0x59>;
		avdd-1v8-supply = <0x19>;
		phandle = <0x7>;
		ports {

			#address-cells = <0x1>;
			#size-cells = <0x0>;
			port@0 {

				reg = <0x0>;
				endpoint {

					remote-endpoint = <0x5a>;
					phandle = <0x53>;
				};
			};
			port@1 {

				reg = <0x1>;
				endpoint {

					remote-endpoint = <0x5b>;
					phandle = <0xbd>;
				};
			};
		};
	};
	qos@fe128000 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe128000 0x0 0x20>;
		phandle = <0x2c>;
	};
	qos@fe138080 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe138080 0x0 0x20>;
		phandle = <0x3b>;
	};
	qos@fe138100 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe138100 0x0 0x20>;
		phandle = <0x3c>;
	};
	qos@fe138180 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe138180 0x0 0x20>;
		phandle = <0x3d>;
	};
	qos@fe148000 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe148000 0x0 0x20>;
		phandle = <0x2d>;
	};
	qos@fe148080 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe148080 0x0 0x20>;
		phandle = <0x2e>;
	};
	qos@fe148100 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe148100 0x0 0x20>;
		phandle = <0x2f>;
	};
	qos@fe150000 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe150000 0x0 0x20>;
		phandle = <0x39>;
	};
	qos@fe158000 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe158000 0x0 0x20>;
		phandle = <0x33>;
	};
	qos@fe158100 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe158100 0x0 0x20>;
		phandle = <0x34>;
	};
	qos@fe158180 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe158180 0x0 0x20>;
		phandle = <0x35>;
	};
	qos@fe158200 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe158200 0x0 0x20>;
		phandle = <0x36>;
	};
	qos@fe158280 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe158280 0x0 0x20>;
		phandle = <0x37>;
	};
	qos@fe158300 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe158300 0x0 0x20>;
		phandle = <0x38>;
	};
	qos@fe180000 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe180000 0x0 0x20>;
	};
	qos@fe190000 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe190000 0x0 0x20>;
		phandle = <0x3e>;
	};
	qos@fe190280 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe190280 0x0 0x20>;
		phandle = <0x3f>;
	};
	qos@fe190300 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe190300 0x0 0x20>;
		phandle = <0x40>;
	};
	qos@fe190380 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe190380 0x0 0x20>;
		phandle = <0x41>;
	};
	qos@fe190400 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe190400 0x0 0x20>;
		phandle = <0x42>;
	};
	qos@fe198000 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe198000 0x0 0x20>;
		phandle = <0x3a>;
	};
	qos@fe1a8000 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe1a8000 0x0 0x20>;
		phandle = <0x30>;
	};
	qos@fe1a8080 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe1a8080 0x0 0x20>;
		phandle = <0x31>;
	};
	qos@fe1a8100 {

		compatible = "rockchip,rk3568-qos", "syscon";
		reg = <0x0 0xfe1a8100 0x0 0x20>;
		phandle = <0x32>;
	};
	pcie@fe260000 {

		compatible = "rockchip,rk3568-pcie";
		reg = <0x3 0xc0000000 0x0 0x400000 0x0 0xfe260000 0x0 0x10000 0x3 0x3f000000 0x0 0x1000000>;
		reg-names = "dbi", "apb", "config";
		interrupts = <0x0 0x4b 0x4 0x0 0x4a 0x4 0x0 0x49 0x4 0x0 0x48 0x4 0x0 0x47 0x4>;
		interrupt-names = "sys", "pmc", "msi", "legacy", "err";
		bus-range = <0x0 0xf>;
		clocks = <0xe 0x81 0xe 0x82 0xe 0x83 0xe 0x84 0xe 0x85>;
		clock-names = "aclk_mst", "aclk_slv", "aclk_dbi", "pclk", "aux";
		device_type = "pci";
		interrupt-map-mask = <0x0 0x0 0x0 0x7>;
		interrupt-map = <0x0 0x0 0x0 0x1 0x5c 0x0 0x0 0x0 0x0 0x2 0x5c 0x1 0x0 0x0 0x0 0x3 0x5c 0x2 0x0 0x0 0x0 0x4 0x5c 0x3>;
		linux,pci-domain = <0x0>;
		num-ib-windows = <0x6>;
		num-ob-windows = <0x2>;
		max-link-speed = <0x2>;
		msi-map = <0x0 0x1 0x0 0x1000>;
		num-lanes = <0x1>;
		phys = <0x11 0x2>;
		phy-names = "pcie-phy";
		power-domains = <0x10 0xf>;
		ranges = <0x1000000 0x0 0x3ef00000 0x3 0x3ef00000 0x0 0x100000 0x2000000 0x0 0x0 0x3 0x0 0x0 0x3ef00000>;
		resets = <0xe 0xa1>;
		reset-names = "pipe";
		#address-cells = <0x3>;
		#size-cells = <0x2>;
		status = "okay";
		pinctrl-names = "default";
		pinctrl-0 = <0x5d>;
		reset-gpios = <0x5e 0xa 0x0>;
		vpcie3v3-supply = <0x5f>;
		legacy-interrupt-controller {

			#address-cells = <0x0>;
			#interrupt-cells = <0x1>;
			interrupt-controller;
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x48 0x1>;
			phandle = <0x5c>;
		};
	};
	mmc@fe2b0000 {

		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
		reg = <0x0 0xfe2b0000 0x0 0x4000>;
		interrupts = <0x0 0x62 0x4>;
		clocks = <0xe 0xb0 0xe 0xb1 0xe 0x18a 0xe 0x18b>;
		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
		fifo-depth = <0x100>;
		max-frequency = <0x8f0d180>;
		resets = <0xe 0xd4>;
		reset-names = "reset";
		status = "okay";
		bus-width = <0x4>;
		cap-sd-highspeed;
		cd-gpios = <0x22 0x4 0x1>;
		disable-wp;
		pinctrl-names = "default";
		pinctrl-0 = <0x60 0x61 0x62 0x63>;
		sd-uhs-sdr104;
		vmmc-supply = <0x64>;
		vqmmc-supply = <0x1a>;
	};
	mmc@fe2c0000 {

		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
		reg = <0x0 0xfe2c0000 0x0 0x4000>;
		interrupts = <0x0 0x63 0x4>;
		clocks = <0xe 0xb2 0xe 0xb3 0xe 0x18c 0xe 0x18d>;
		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
		fifo-depth = <0x100>;
		max-frequency = <0x8f0d180>;
		resets = <0xe 0xd6>;
		reset-names = "reset";
		status = "okay";
		bus-width = <0x4>;
		cap-sd-highspeed;
		cap-sdio-irq;
		keep-power-in-suspend;
		mmc-pwrseq = <0x65>;
		non-removable;
		pinctrl-names = "default";
		pinctrl-0 = <0x66 0x67 0x68>;
		sd-uhs-sdr104;
		vmmc-supply = <0x69>;
		vqmmc-supply = <0x19>;
	};
	spi@fe300000 {

		compatible = "rockchip,sfc";
		reg = <0x0 0xfe300000 0x0 0x4000>;
		interrupts = <0x0 0x65 0x4>;
		clocks = <0xe 0x78 0xe 0x76>;
		clock-names = "clk_sfc", "hclk_sfc";
		pinctrl-0 = <0x6a>;
		pinctrl-names = "default";
		status = "disabled";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		flash@0 {

			compatible = "jedec,spi-nor";
			reg = <0x0>;
			spi-max-frequency = <0x16e3600>;
			spi-rx-bus-width = <0x4>;
			spi-tx-bus-width = <0x1>;
		};
	};
	mmc@fe310000 {

		compatible = "rockchip,rk3568-dwcmshc";
		reg = <0x0 0xfe310000 0x0 0x10000>;
		interrupts = <0x0 0x13 0x4>;
		assigned-clocks = <0xe 0x7b 0xe 0x7d>;
		assigned-clock-rates = <0xbebc200 0x16e3600>;
		clocks = <0xe 0x7c 0xe 0x7a 0xe 0x79 0xe 0x7b 0xe 0x7d>;
		clock-names = "core", "bus", "axi", "block", "timer";
		status = "okay";
		bus-width = <0x8>;
		mmc-hs200-1_8v;
		non-removable;
		vmmc-supply = <0x1b>;
		vqmmc-supply = <0x19>;
	};
	spdif@fe460000 {

		compatible = "rockchip,rk3568-spdif";
		reg = <0x0 0xfe460000 0x0 0x1000>;
		interrupts = <0x0 0x66 0x4>;
		clock-names = "mclk", "hclk";
		clocks = <0xe 0x5f 0xe 0x5c>;
		dmas = <0x6b 0x1>;
		dma-names = "tx";
		pinctrl-names = "default";
		pinctrl-0 = <0x6c>;
		#sound-dai-cells = <0x0>;
		status = "okay";
		phandle = <0xc2>;
	};
	i2s@fe400000 {

		compatible = "rockchip,rk3568-i2s-tdm";
		reg = <0x0 0xfe400000 0x0 0x1000>;
		interrupts = <0x0 0x34 0x4>;
		assigned-clocks = <0xe 0x3d 0xe 0x41>;
		assigned-clock-rates = <0x46cf7100 0x46cf7100>;
		clocks = <0xe 0x3f 0xe 0x43 0xe 0x39>;
		clock-names = "mclk_tx", "mclk_rx", "hclk";
		dmas = <0x6b 0x0>;
		dma-names = "tx";
		resets = <0xe 0x50 0xe 0x51>;
		reset-names = "tx-m", "rx-m";
		rockchip,grf = <0x1f>;
		#sound-dai-cells = <0x0>;
		status = "okay";
		phandle = <0x8>;
	};
	i2s@fe410000 {

		compatible = "rockchip,rk3568-i2s-tdm";
		reg = <0x0 0xfe410000 0x0 0x1000>;
		interrupts = <0x0 0x35 0x4>;
		assigned-clocks = <0xe 0x45 0xe 0x49>;
		assigned-clock-rates = <0x46cf7100 0x46cf7100>;
		clocks = <0xe 0x47 0xe 0x4b 0xe 0x3a>;
		clock-names = "mclk_tx", "mclk_rx", "hclk";
		dmas = <0x6b 0x3 0x6b 0x2>;
		dma-names = "rx", "tx";
		resets = <0xe 0x52 0xe 0x53>;
		reset-names = "tx-m", "rx-m";
		rockchip,grf = <0x1f>;
		pinctrl-names = "default";
		pinctrl-0 = <0x6d 0x6e 0x6f 0x70>;
		#sound-dai-cells = <0x0>;
		status = "okay";
		rockchip,trcm-sync-tx-only;
		phandle = <0xc0>;
	};
	i2s@fe430000 {

		compatible = "rockchip,rk3568-i2s-tdm";
		reg = <0x0 0xfe430000 0x0 0x1000>;
		interrupts = <0x0 0x37 0x4>;
		clocks = <0xe 0x53 0xe 0x57 0xe 0x3c>;
		clock-names = "mclk_tx", "mclk_rx", "hclk";
		dmas = <0x6b 0x6 0x6b 0x7>;
		dma-names = "tx", "rx";
		resets = <0xe 0x55 0xe 0x56>;
		reset-names = "tx-m", "rx-m";
		rockchip,grf = <0x1f>;
		#sound-dai-cells = <0x0>;
		status = "disabled";
	};
	pdm@fe440000 {

		compatible = "rockchip,rk3568-pdm";
		reg = <0x0 0xfe440000 0x0 0x1000>;
		interrupts = <0x0 0x4c 0x4>;
		clocks = <0xe 0x5a 0xe 0x59>;
		clock-names = "pdm_clk", "pdm_hclk";
		dmas = <0x6b 0x9>;
		dma-names = "rx";
		pinctrl-0 = <0x71 0x72 0x73 0x74 0x75 0x76>;
		pinctrl-names = "default";
		resets = <0xe 0x58>;
		reset-names = "pdm-m";
		#sound-dai-cells = <0x0>;
		status = "disabled";
	};
	dma-controller@fe530000 {

		compatible = "arm,pl330", "arm,primecell";
		reg = <0x0 0xfe530000 0x0 0x4000>;
		interrupts = <0x0 0xe 0x4 0x0 0xd 0x4>;
		arm,pl330-periph-burst;
		clocks = <0xe 0x10d>;
		clock-names = "apb_pclk";
		#dma-cells = <0x1>;
		phandle = <0x26>;
	};
	dma-controller@fe550000 {

		compatible = "arm,pl330", "arm,primecell";
		reg = <0x0 0xfe550000 0x0 0x4000>;
		interrupts = <0x0 0x10 0x4 0x0 0xf 0x4>;
		arm,pl330-periph-burst;
		clocks = <0xe 0x10d>;
		clock-names = "apb_pclk";
		#dma-cells = <0x1>;
		phandle = <0x6b>;
	};
	i2c@fe5a0000 {

		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
		reg = <0x0 0xfe5a0000 0x0 0x1000>;
		interrupts = <0x0 0x2f 0x4>;
		clocks = <0xe 0x148 0xe 0x147>;
		clock-names = "i2c", "pclk";
		pinctrl-0 = <0x77>;
		pinctrl-names = "default";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";
	};
	i2c@fe5b0000 {

		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
		reg = <0x0 0xfe5b0000 0x0 0x1000>;
		interrupts = <0x0 0x30 0x4>;
		clocks = <0xe 0x14a 0xe 0x149>;
		clock-names = "i2c", "pclk";
		pinctrl-0 = <0x78>;
		pinctrl-names = "default";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";
	};
	i2c@fe5c0000 {

		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
		reg = <0x0 0xfe5c0000 0x0 0x1000>;
		interrupts = <0x0 0x31 0x4>;
		clocks = <0xe 0x14c 0xe 0x14b>;
		clock-names = "i2c", "pclk";
		pinctrl-0 = <0x79>;
		pinctrl-names = "default";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "okay";
	};
	i2c@fe5d0000 {

		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
		reg = <0x0 0xfe5d0000 0x0 0x1000>;
		interrupts = <0x0 0x32 0x4>;
		clocks = <0xe 0x14e 0xe 0x14d>;
		clock-names = "i2c", "pclk";
		pinctrl-0 = <0x7a>;
		pinctrl-names = "default";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";
	};
	i2c@fe5e0000 {

		compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c";
		reg = <0x0 0xfe5e0000 0x0 0x1000>;
		interrupts = <0x0 0x33 0x4>;
		clocks = <0xe 0x150 0xe 0x14f>;
		clock-names = "i2c", "pclk";
		pinctrl-0 = <0x7b>;
		pinctrl-names = "default";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";
	};
	watchdog@fe600000 {

		compatible = "rockchip,rk3568-wdt", "snps,dw-wdt";
		reg = <0x0 0xfe600000 0x0 0x100>;
		interrupts = <0x0 0x95 0x4>;
		clocks = <0xe 0x116 0xe 0x115>;
		clock-names = "tclk", "pclk";
	};
	spi@fe610000 {

		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
		reg = <0x0 0xfe610000 0x0 0x1000>;
		interrupts = <0x0 0x67 0x4>;
		clocks = <0xe 0x152 0xe 0x151>;
		clock-names = "spiclk", "apb_pclk";
		dmas = <0x26 0x14 0x26 0x15>;
		dma-names = "tx", "rx";
		pinctrl-names = "default";
		pinctrl-0 = <0x7c 0x7d 0x7e>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";
	};
	spi@fe620000 {

		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
		reg = <0x0 0xfe620000 0x0 0x1000>;
		interrupts = <0x0 0x68 0x4>;
		clocks = <0xe 0x154 0xe 0x153>;
		clock-names = "spiclk", "apb_pclk";
		dmas = <0x26 0x16 0x26 0x17>;
		dma-names = "tx", "rx";
		pinctrl-names = "default";
		pinctrl-0 = <0x7f 0x80>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";
	};
	spi@fe630000 {

		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
		reg = <0x0 0xfe630000 0x0 0x1000>;
		interrupts = <0x0 0x69 0x4>;
		clocks = <0xe 0x156 0xe 0x155>;
		clock-names = "spiclk", "apb_pclk";
		dmas = <0x26 0x18 0x26 0x19>;
		dma-names = "tx", "rx";
		pinctrl-names = "default";
		pinctrl-0 = <0x81 0x82 0x83>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";
	};
	spi@fe640000 {

		compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi";
		reg = <0x0 0xfe640000 0x0 0x1000>;
		interrupts = <0x0 0x6a 0x4>;
		clocks = <0xe 0x158 0xe 0x157>;
		clock-names = "spiclk", "apb_pclk";
		dmas = <0x26 0x1a 0x26 0x1b>;
		dma-names = "tx", "rx";
		pinctrl-names = "default";
		pinctrl-0 = <0x84 0x85 0x86>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "disabled";
	};
	serial@fe650000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfe650000 0x0 0x100>;
		interrupts = <0x0 0x75 0x4>;
		clocks = <0xe 0x11f 0xe 0x11c>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0x2 0x26 0x3>;
		pinctrl-0 = <0x87 0x88>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "okay";
		uart-has-rtscts;
		bluetooth {

			compatible = "brcm,bcm43438-bt";
			clocks = <0x89 0x1>;
			clock-names = "lpo";
			device-wakeup-gpios = <0x8a 0x11 0x0>;
			host-wakeup-gpios = <0x8a 0x10 0x0>;
			shutdown-gpios = <0x8a 0xf 0x0>;
			pinctrl-names = "default";
			pinctrl-0 = <0x8b 0x8c 0x8d>;
			vbat-supply = <0x21>;
			vddio-supply = <0x8e>;
		};
	};
	serial@fe660000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfe660000 0x0 0x100>;
		interrupts = <0x0 0x76 0x4>;
		clocks = <0xe 0x123 0xe 0x120>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0x4 0x26 0x5>;
		pinctrl-0 = <0x8f>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "okay";
	};
	serial@fe670000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfe670000 0x0 0x100>;
		interrupts = <0x0 0x77 0x4>;
		clocks = <0xe 0x127 0xe 0x124>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0x6 0x26 0x7>;
		pinctrl-0 = <0x90>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "disabled";
	};
	serial@fe680000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfe680000 0x0 0x100>;
		interrupts = <0x0 0x78 0x4>;
		clocks = <0xe 0x12b 0xe 0x128>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0x8 0x26 0x9>;
		pinctrl-0 = <0x91>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "disabled";
	};
	serial@fe690000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfe690000 0x0 0x100>;
		interrupts = <0x0 0x79 0x4>;
		clocks = <0xe 0x12f 0xe 0x12c>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0xa 0x26 0xb>;
		pinctrl-0 = <0x92>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "disabled";
	};
	serial@fe6a0000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfe6a0000 0x0 0x100>;
		interrupts = <0x0 0x7a 0x4>;
		clocks = <0xe 0x133 0xe 0x130>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0xc 0x26 0xd>;
		pinctrl-0 = <0x93>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "disabled";
	};
	serial@fe6b0000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfe6b0000 0x0 0x100>;
		interrupts = <0x0 0x7b 0x4>;
		clocks = <0xe 0x137 0xe 0x134>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0xe 0x26 0xf>;
		pinctrl-0 = <0x94>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "disabled";
	};
	serial@fe6c0000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfe6c0000 0x0 0x100>;
		interrupts = <0x0 0x7c 0x4>;
		clocks = <0xe 0x13b 0xe 0x138>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0x10 0x26 0x11>;
		pinctrl-0 = <0x95>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "disabled";
	};
	serial@fe6d0000 {

		compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart";
		reg = <0x0 0xfe6d0000 0x0 0x100>;
		interrupts = <0x0 0x7d 0x4>;
		clocks = <0xe 0x13f 0xe 0x13c>;
		clock-names = "baudclk", "apb_pclk";
		dmas = <0x26 0x12 0x26 0x13>;
		pinctrl-0 = <0x96>;
		pinctrl-names = "default";
		reg-io-width = <0x4>;
		reg-shift = <0x2>;
		status = "disabled";
	};
	thermal-zones {

		cpu-thermal {

			polling-delay-passive = <0x64>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x97 0x0>;
			trips {

				cpu_alert0 {

					temperature = <0x11170>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x98>;
				};
				cpu_alert1 {

					temperature = <0x124f8>;
					hysteresis = <0x7d0>;
					type = "passive";
				};
				cpu_crit {

					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "critical";
				};
				cpu_hot {

					temperature = <0xd6d8>;
					hysteresis = <0x7d0>;
					type = "active";
					phandle = <0x99>;
				};
			};
			cooling-maps {

				map0 {

					trip = <0x98>;
					cooling-device = <0x9 0xffffffff 0xffffffff 0xa 0xffffffff 0xffffffff 0xb 0xffffffff 0xffffffff 0xc 0xffffffff 0xffffffff>;
				};
				map1 {

					trip = <0x99>;
					cooling-device = <0x9a 0xffffffff 0xffffffff>;
				};
			};
		};
		gpu-thermal {

			polling-delay-passive = <0x14>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x97 0x1>;
			trips {

				gpu-threshold {

					temperature = <0x11170>;
					hysteresis = <0x7d0>;
					type = "passive";
				};
				gpu-target {

					temperature = <0x124f8>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x9b>;
				};
				gpu-crit {

					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "critical";
				};
			};
			cooling-maps {

				map0 {

					trip = <0x9b>;
					cooling-device = <0x9c 0xffffffff 0xffffffff>;
				};
			};
		};
	};
	tsadc@fe710000 {

		compatible = "rockchip,rk3568-tsadc";
		reg = <0x0 0xfe710000 0x0 0x100>;
		interrupts = <0x0 0x73 0x4>;
		assigned-clocks = <0xe 0x110 0xe 0x111>;
		assigned-clock-rates = <0x1036640 0xaae60>;
		clocks = <0xe 0x111 0xe 0x10f>;
		clock-names = "tsadc", "apb_pclk";
		resets = <0xe 0x181 0xe 0x182 0xe 0x1d7>;
		rockchip,grf = <0x1f>;
		rockchip,hw-tshut-temp = <0x17318>;
		pinctrl-names = "init", "default", "sleep";
		pinctrl-0 = <0x9d>;
		pinctrl-1 = <0x9e>;
		pinctrl-2 = <0x9d>;
		#thermal-sensor-cells = <0x1>;
		status = "okay";
		rockchip,hw-tshut-mode = <0x1>;
		rockchip,hw-tshut-polarity = <0x0>;
		phandle = <0x97>;
	};
	saradc@fe720000 {

		compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc";
		reg = <0x0 0xfe720000 0x0 0x100>;
		interrupts = <0x0 0x5d 0x4>;
		clocks = <0xe 0x113 0xe 0x112>;
		clock-names = "saradc", "apb_pclk";
		resets = <0xe 0x180>;
		reset-names = "saradc-apb";
		#io-channel-cells = <0x1>;
		status = "disabled";
	};
	pwm@fe6e0000 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe6e0000 0x0 0x10>;
		clocks = <0xe 0x15a 0xe 0x159>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0x9f>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe6e0010 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe6e0010 0x0 0x10>;
		clocks = <0xe 0x15a 0xe 0x159>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa0>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe6e0020 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe6e0020 0x0 0x10>;
		clocks = <0xe 0x15a 0xe 0x159>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa1>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe6e0030 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe6e0030 0x0 0x10>;
		clocks = <0xe 0x15a 0xe 0x159>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa2>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe6f0000 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe6f0000 0x0 0x10>;
		clocks = <0xe 0x15d 0xe 0x15c>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa3>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe6f0010 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe6f0010 0x0 0x10>;
		clocks = <0xe 0x15d 0xe 0x15c>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa4>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe6f0020 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe6f0020 0x0 0x10>;
		clocks = <0xe 0x15d 0xe 0x15c>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa5>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe6f0030 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe6f0030 0x0 0x10>;
		clocks = <0xe 0x15d 0xe 0x15c>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa6>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe700000 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe700000 0x0 0x10>;
		clocks = <0xe 0x160 0xe 0x15f>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa7>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe700010 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe700010 0x0 0x10>;
		clocks = <0xe 0x160 0xe 0x15f>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa8>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe700020 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe700020 0x0 0x10>;
		clocks = <0xe 0x160 0xe 0x15f>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xa9>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	pwm@fe700030 {

		compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm";
		reg = <0x0 0xfe700030 0x0 0x10>;
		clocks = <0xe 0x160 0xe 0x15f>;
		clock-names = "pwm", "pclk";
		pinctrl-0 = <0xaa>;
		pinctrl-names = "default";
		#pwm-cells = <0x3>;
		status = "disabled";
	};
	phy@fe830000 {

		compatible = "rockchip,rk3568-naneng-combphy";
		reg = <0x0 0xfe830000 0x0 0x100>;
		clocks = <0x1e 0x22 0xe 0x17d 0xe 0x7f>;
		clock-names = "ref", "apb", "pipe";
		assigned-clocks = <0x1e 0x22>;
		assigned-clock-rates = <0x5f5e100>;
		resets = <0xe 0x1c7>;
		rockchip,pipe-grf = <0xab>;
		rockchip,pipe-phy-grf = <0xac>;
		#phy-cells = <0x1>;
		status = "okay";
		phandle = <0xf>;
	};
	phy@fe840000 {

		compatible = "rockchip,rk3568-naneng-combphy";
		reg = <0x0 0xfe840000 0x0 0x100>;
		clocks = <0x1e 0x25 0xe 0x17e 0xe 0x7f>;
		clock-names = "ref", "apb", "pipe";
		assigned-clocks = <0x1e 0x25>;
		assigned-clock-rates = <0x5f5e100>;
		resets = <0xe 0x1c9>;
		rockchip,pipe-grf = <0xab>;
		rockchip,pipe-phy-grf = <0xad>;
		#phy-cells = <0x1>;
		status = "okay";
		phandle = <0x11>;
	};
	phy@fe870000 {

		compatible = "rockchip,rk3568-csi-dphy";
		reg = <0x0 0xfe870000 0x0 0x10000>;
		clocks = <0xe 0x179>;
		clock-names = "pclk";
		#phy-cells = <0x0>;
		resets = <0xe 0x1ba>;
		reset-names = "apb";
		rockchip,grf = <0x1f>;
		status = "disabled";
	};
	mipi-dphy@fe850000 {

		compatible = "rockchip,rk3568-dsi-dphy";
		reg = <0x0 0xfe850000 0x0 0x10000>;
		clock-names = "ref", "pclk";
		clocks = <0x1e 0x17 0xe 0x17a>;
		#phy-cells = <0x0>;
		power-domains = <0x10 0x9>;
		reset-names = "apb";
		resets = <0xe 0x1bb>;
		status = "disabled";
		phandle = <0x54>;
	};
	mipi-dphy@fe860000 {

		compatible = "rockchip,rk3568-dsi-dphy";
		reg = <0x0 0xfe860000 0x0 0x10000>;
		clock-names = "ref", "pclk";
		clocks = <0x1e 0x19 0xe 0x17b>;
		#phy-cells = <0x0>;
		power-domains = <0x10 0x9>;
		reset-names = "apb";
		resets = <0xe 0x1bc>;
		status = "disabled";
		phandle = <0x55>;
	};
	usb2phy@fe8a0000 {

		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8a0000 0x0 0x10000>;
		clocks = <0x1e 0x13>;
		clock-names = "phyclk";
		clock-output-names = "clk_usbphy0_480m";
		interrupts = <0x0 0x87 0x4>;
		rockchip,usbgrf = <0xae>;
		#clock-cells = <0x0>;
		status = "okay";
		phandle = <0x13>;
		host-port {

			#phy-cells = <0x0>;
			status = "okay";
			phy-supply = <0xaf>;
			phandle = <0x14>;
		};
		otg-port {

			#phy-cells = <0x0>;
			status = "okay";
			phy-supply = <0xb0>;
			phandle = <0x12>;
		};
	};
	usb2phy@fe8b0000 {

		compatible = "rockchip,rk3568-usb2phy";
		reg = <0x0 0xfe8b0000 0x0 0x10000>;
		clocks = <0x1e 0x15>;
		clock-names = "phyclk";
		clock-output-names = "clk_usbphy1_480m";
		interrupts = <0x0 0x88 0x4>;
		rockchip,usbgrf = <0xb1>;
		#clock-cells = <0x0>;
		status = "okay";
		host-port {

			#phy-cells = <0x0>;
			status = "okay";
			phy-supply = <0xaf>;
			phandle = <0x16>;
		};
		otg-port {

			#phy-cells = <0x0>;
			status = "okay";
			phy-supply = <0xaf>;
			phandle = <0x15>;
		};
	};
	pinctrl {

		compatible = "rockchip,rk3568-pinctrl";
		rockchip,grf = <0x1f>;
		rockchip,pmu = <0xb2>;
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;
		gpio@fdd60000 {

			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xfdd60000 0x0 0x100>;
			interrupts = <0x0 0x21 0x4>;
			clocks = <0x1e 0x2e 0x1e 0xc>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x22>;
		};
		gpio@fe740000 {

			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xfe740000 0x0 0x100>;
			interrupts = <0x0 0x22 0x4>;
			clocks = <0xe 0x163 0xe 0x164>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x5e>;
		};
		gpio@fe750000 {

			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xfe750000 0x0 0x100>;
			interrupts = <0x0 0x23 0x4>;
			clocks = <0xe 0x165 0xe 0x166>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0x8a>;
		};
		gpio@fe760000 {

			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xfe760000 0x0 0x100>;
			interrupts = <0x0 0x24 0x4>;
			clocks = <0xe 0x167 0xe 0x168>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
		};
		gpio@fe770000 {

			compatible = "rockchip,gpio-bank";
			reg = <0x0 0xfe770000 0x0 0x100>;
			interrupts = <0x0 0x25 0x4>;
			clocks = <0xe 0x169 0xe 0x16a>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			phandle = <0xc6>;
		};
		pcfg-pull-up {

			bias-pull-up;
			phandle = <0xb5>;
		};
		pcfg-pull-down {

			bias-pull-down;
			phandle = <0xbb>;
		};
		pcfg-pull-none {

			bias-disable;
			phandle = <0xb3>;
		};
		pcfg-pull-none-drv-level-1 {

			bias-disable;
			drive-strength = <0x1>;
			phandle = <0xb7>;
		};
		pcfg-pull-none-drv-level-2 {

			bias-disable;
			drive-strength = <0x2>;
			phandle = <0xb6>;
		};
		pcfg-pull-none-drv-level-3 {

			bias-disable;
			drive-strength = <0x3>;
			phandle = <0xba>;
		};
		pcfg-pull-up-drv-level-1 {

			bias-pull-up;
			drive-strength = <0x1>;
			phandle = <0xb9>;
		};
		pcfg-pull-up-drv-level-2 {

			bias-pull-up;
			drive-strength = <0x2>;
			phandle = <0xb4>;
		};
		pcfg-pull-none-smt {

			bias-disable;
			input-schmitt-enable;
			phandle = <0xb8>;
		};
		acodec {

		};
		audiopwm {

		};
		bt656 {

		};
		bt1120 {

		};
		cam {

		};
		can0 {

		};
		can1 {

		};
		can2 {

		};
		cif {

		};
		clk32k {

			clk32k-out0 {

				rockchip,pins = <0x0 0x8 0x2 0xb3>;
				phandle = <0xd>;
			};
		};
		cpu {

		};
		ebc {

		};
		edpdp {

		};
		emmc {

		};
		eth0 {

		};
		eth1 {

		};
		flash {

		};
		fspi {

			fspi-pins {

				rockchip,pins = <0x1 0x18 0x1 0xb3 0x1 0x1b 0x1 0xb3 0x1 0x19 0x1 0xb3 0x1 0x1a 0x1 0xb3 0x1 0x17 0x2 0xb3 0x1 0x1c 0x1 0xb3>;
				phandle = <0x6a>;
			};
		};
		gmac0 {

		};
		gmac1 {

			gmac1m0-miim {

				rockchip,pins = <0x3 0x14 0x3 0xb3 0x3 0x15 0x3 0xb3>;
				phandle = <0x4b>;
			};
			gmac1m0-clkinout {

				rockchip,pins = <0x3 0x10 0x3 0xb3>;
				phandle = <0x4f>;
			};
			gmac1m0-rx-bus2 {

				rockchip,pins = <0x3 0x9 0x3 0xb3 0x3 0xa 0x3 0xb3 0x3 0xb 0x3 0xb3>;
				phandle = <0x4d>;
			};
			gmac1m0-tx-bus2 {

				rockchip,pins = <0x3 0xd 0x3 0xb6 0x3 0xe 0x3 0xb6 0x3 0xf 0x3 0xb3>;
				phandle = <0x4c>;
			};
			gmac1m0-rgmii-clk {

				rockchip,pins = <0x3 0x7 0x3 0xb3 0x3 0x6 0x3 0xb7>;
				phandle = <0x4e>;
			};
			gmac1m0-rgmii-bus {

				rockchip,pins = <0x3 0x4 0x3 0xb3 0x3 0x5 0x3 0xb3 0x3 0x2 0x3 0xb6 0x3 0x3 0x3 0xb6>;
				phandle = <0x50>;
			};
		};
		gpu {

		};
		hdmitx {

			hdmitxm0-cec {

				rockchip,pins = <0x4 0x19 0x1 0xb3>;
				phandle = <0x58>;
			};
			hdmitx-scl {

				rockchip,pins = <0x4 0x17 0x1 0xb3>;
				phandle = <0x56>;
			};
			hdmitx-sda {

				rockchip,pins = <0x4 0x18 0x1 0xb3>;
				phandle = <0x57>;
			};
		};
		i2c0 {

			i2c0-xfer {

				rockchip,pins = <0x0 0x9 0x1 0xb8 0x0 0xa 0x1 0xb8>;
				phandle = <0x20>;
			};
		};
		i2c1 {

			i2c1-xfer {

				rockchip,pins = <0x0 0xb 0x1 0xb8 0x0 0xc 0x1 0xb8>;
				phandle = <0x77>;
			};
		};
		i2c2 {

			i2c2m0-xfer {

				rockchip,pins = <0x0 0xd 0x1 0xb8 0x0 0xe 0x1 0xb8>;
				phandle = <0x78>;
			};
		};
		i2c3 {

			i2c3m0-xfer {

				rockchip,pins = <0x1 0x1 0x1 0xb8 0x1 0x0 0x1 0xb8>;
				phandle = <0x79>;
			};
		};
		i2c4 {

			i2c4m0-xfer {

				rockchip,pins = <0x4 0xb 0x1 0xb8 0x4 0xa 0x1 0xb8>;
				phandle = <0x7a>;
			};
		};
		i2c5 {

			i2c5m0-xfer {

				rockchip,pins = <0x3 0xb 0x4 0xb8 0x3 0xc 0x4 0xb8>;
				phandle = <0x7b>;
			};
		};
		i2s1 {

			i2s1m0-lrcktx {

				rockchip,pins = <0x1 0x5 0x1 0xb3>;
				phandle = <0x6e>;
			};
			i2s1m0-mclk {

				rockchip,pins = <0x1 0x2 0x1 0xb3>;
				phandle = <0x24>;
			};
			i2s1m0-sclktx {

				rockchip,pins = <0x1 0x3 0x1 0xb3>;
				phandle = <0x6d>;
			};
			i2s1m0-sdi0 {

				rockchip,pins = <0x1 0xb 0x1 0xb3>;
				phandle = <0x6f>;
			};
			i2s1m0-sdo0 {

				rockchip,pins = <0x1 0x7 0x1 0xb3>;
				phandle = <0x70>;
			};
		};
		i2s2 {

		};
		i2s3 {

		};
		isp {

		};
		jtag {

		};
		lcdc {

		};
		mcu {

		};
		npu {

		};
		pcie20 {

		};
		pcie30x1 {

		};
		pcie30x2 {

		};
		pdm {

			pdmm0-clk {

				rockchip,pins = <0x1 0x6 0x3 0xb3>;
				phandle = <0x71>;
			};
			pdmm0-clk1 {

				rockchip,pins = <0x1 0x4 0x3 0xb3>;
				phandle = <0x72>;
			};
			pdmm0-sdi0 {

				rockchip,pins = <0x1 0xb 0x2 0xb3>;
				phandle = <0x73>;
			};
			pdmm0-sdi1 {

				rockchip,pins = <0x1 0xa 0x3 0xb3>;
				phandle = <0x74>;
			};
			pdmm0-sdi2 {

				rockchip,pins = <0x1 0x9 0x3 0xb3>;
				phandle = <0x75>;
			};
			pdmm0-sdi3 {

				rockchip,pins = <0x1 0x8 0x3 0xb3>;
				phandle = <0x76>;
			};
		};
		pmic {

			pmic-int-l {

				rockchip,pins = <0x0 0x3 0x0 0xb5>;
				phandle = <0x23>;
			};
		};
		pmu {

		};
		pwm0 {

			pwm0m0-pins {

				rockchip,pins = <0x0 0xf 0x1 0xb3>;
				phandle = <0x28>;
			};
		};
		pwm1 {

			pwm1m0-pins {

				rockchip,pins = <0x0 0x10 0x1 0xb3>;
				phandle = <0x29>;
			};
		};
		pwm2 {

			pwm2m0-pins {

				rockchip,pins = <0x0 0x11 0x1 0xb3>;
				phandle = <0x2a>;
			};
		};
		pwm3 {

			pwm3-pins {

				rockchip,pins = <0x0 0x12 0x1 0xb3>;
				phandle = <0x2b>;
			};
		};
		pwm4 {

			pwm4-pins {

				rockchip,pins = <0x0 0x13 0x1 0xb3>;
				phandle = <0x9f>;
			};
		};
		pwm5 {

			pwm5-pins {

				rockchip,pins = <0x0 0x14 0x1 0xb3>;
				phandle = <0xa0>;
			};
		};
		pwm6 {

			pwm6-pins {

				rockchip,pins = <0x0 0x15 0x1 0xb3>;
				phandle = <0xa1>;
			};
		};
		pwm7 {

			pwm7-pins {

				rockchip,pins = <0x0 0x16 0x1 0xb3>;
				phandle = <0xa2>;
			};
		};
		pwm8 {

			pwm8m0-pins {

				rockchip,pins = <0x3 0x9 0x5 0xb3>;
				phandle = <0xa3>;
			};
		};
		pwm9 {

			pwm9m0-pins {

				rockchip,pins = <0x3 0xa 0x5 0xb3>;
				phandle = <0xa4>;
			};
		};
		pwm10 {

			pwm10m0-pins {

				rockchip,pins = <0x3 0xd 0x5 0xb3>;
				phandle = <0xa5>;
			};
		};
		pwm11 {

			pwm11m0-pins {

				rockchip,pins = <0x3 0xe 0x5 0xb3>;
				phandle = <0xa6>;
			};
		};
		pwm12 {

			pwm12m0-pins {

				rockchip,pins = <0x3 0xf 0x2 0xb3>;
				phandle = <0xa7>;
			};
		};
		pwm13 {

			pwm13m0-pins {

				rockchip,pins = <0x3 0x10 0x2 0xb3>;
				phandle = <0xa8>;
			};
		};
		pwm14 {

			pwm14m0-pins {

				rockchip,pins = <0x3 0x14 0x1 0xb3>;
				phandle = <0xa9>;
			};
		};
		pwm15 {

			pwm15m0-pins {

				rockchip,pins = <0x3 0x15 0x1 0xb3>;
				phandle = <0xaa>;
			};
		};
		refclk {

		};
		sata {

		};
		sata0 {

		};
		sata1 {

		};
		sata2 {

		};
		scr {

		};
		sdmmc0 {

			sdmmc0-bus4 {

				rockchip,pins = <0x1 0x1d 0x1 0xb4 0x1 0x1e 0x1 0xb4 0x1 0x1f 0x1 0xb4 0x2 0x0 0x1 0xb4>;
				phandle = <0x60>;
			};
			sdmmc0-clk {

				rockchip,pins = <0x2 0x2 0x1 0xb4>;
				phandle = <0x61>;
			};
			sdmmc0-cmd {

				rockchip,pins = <0x2 0x1 0x1 0xb4>;
				phandle = <0x62>;
			};
			sdmmc0-det {

				rockchip,pins = <0x0 0x4 0x1 0xb5>;
				phandle = <0x63>;
			};
		};
		sdmmc1 {

			sdmmc1-bus4 {

				rockchip,pins = <0x2 0x3 0x1 0xb4 0x2 0x4 0x1 0xb4 0x2 0x5 0x1 0xb4 0x2 0x6 0x1 0xb4>;
				phandle = <0x66>;
			};
			sdmmc1-clk {

				rockchip,pins = <0x2 0x8 0x1 0xb4>;
				phandle = <0x68>;
			};
			sdmmc1-cmd {

				rockchip,pins = <0x2 0x7 0x1 0xb4>;
				phandle = <0x67>;
			};
		};
		sdmmc2 {

		};
		spdif {

			spdifm0-tx {

				rockchip,pins = <0x1 0x4 0x4 0xb3>;
				phandle = <0x6c>;
			};
		};
		spi0 {

			spi0m0-pins {

				rockchip,pins = <0x0 0xd 0x2 0xb3 0x0 0x15 0x2 0xb3 0x0 0xe 0x2 0xb3>;
				phandle = <0x7e>;
			};
			spi0m0-cs0 {

				rockchip,pins = <0x0 0x16 0x2 0xb3>;
				phandle = <0x7c>;
			};
			spi0m0-cs1 {

				rockchip,pins = <0x0 0x14 0x2 0xb3>;
				phandle = <0x7d>;
			};
		};
		spi1 {

			spi1m1-pins {

				rockchip,pins = <0x3 0x13 0x3 0xb3 0x3 0x12 0x3 0xb3 0x3 0x11 0x3 0xb3>;
				phandle = <0x80>;
			};
			spi1m1-cs0 {

				rockchip,pins = <0x3 0x1 0x3 0xb3>;
				phandle = <0x7f>;
			};
		};
		spi2 {

			spi2m0-pins {

				rockchip,pins = <0x2 0x11 0x4 0xb3 0x2 0x12 0x4 0xb3 0x2 0x13 0x4 0xb3>;
				phandle = <0x83>;
			};
			spi2m0-cs0 {

				rockchip,pins = <0x2 0x14 0x4 0xb3>;
				phandle = <0x81>;
			};
			spi2m0-cs1 {

				rockchip,pins = <0x2 0x15 0x4 0xb3>;
				phandle = <0x82>;
			};
		};
		spi3 {

			spi3m0-pins {

				rockchip,pins = <0x4 0xb 0x4 0xb3 0x4 0x8 0x4 0xb3 0x4 0xa 0x4 0xb3>;
				phandle = <0x86>;
			};
			spi3m0-cs0 {

				rockchip,pins = <0x4 0x6 0x4 0xb3>;
				phandle = <0x84>;
			};
			spi3m0-cs1 {

				rockchip,pins = <0x4 0x7 0x4 0xb3>;
				phandle = <0x85>;
			};
		};
		tsadc {

			tsadc-shutorg {

				rockchip,pins = <0x0 0x1 0x2 0xb3>;
				phandle = <0x9e>;
			};
			tsadc-pin {

				rockchip,pins = <0x0 0x1 0x0 0xb3>;
				phandle = <0x9d>;
			};
		};
		uart0 {

			uart0-xfer {

				rockchip,pins = <0x0 0x10 0x3 0xb5 0x0 0x11 0x3 0xb5>;
				phandle = <0x27>;
			};
		};
		uart1 {

			uart1m0-xfer {

				rockchip,pins = <0x2 0xb 0x2 0xb5 0x2 0xc 0x2 0xb5>;
				phandle = <0x87>;
			};
			uart1m0-ctsn {

				rockchip,pins = <0x2 0xe 0x2 0xb3>;
				phandle = <0x88>;
			};
		};
		uart2 {

			uart2m0-xfer {

				rockchip,pins = <0x0 0x18 0x1 0xb5 0x0 0x19 0x1 0xb5>;
				phandle = <0x8f>;
			};
		};
		uart3 {

			uart3m0-xfer {

				rockchip,pins = <0x1 0x0 0x2 0xb5 0x1 0x1 0x2 0xb5>;
				phandle = <0x90>;
			};
		};
		uart4 {

			uart4m0-xfer {

				rockchip,pins = <0x1 0x4 0x2 0xb5 0x1 0x6 0x2 0xb5>;
				phandle = <0x91>;
			};
		};
		uart5 {

			uart5m0-xfer {

				rockchip,pins = <0x2 0x1 0x3 0xb5 0x2 0x2 0x3 0xb5>;
				phandle = <0x92>;
			};
		};
		uart6 {

			uart6m0-xfer {

				rockchip,pins = <0x2 0x3 0x3 0xb5 0x2 0x4 0x3 0xb5>;
				phandle = <0x93>;
			};
		};
		uart7 {

			uart7m0-xfer {

				rockchip,pins = <0x2 0x5 0x3 0xb5 0x2 0x6 0x3 0xb5>;
				phandle = <0x94>;
			};
		};
		uart8 {

			uart8m0-xfer {

				rockchip,pins = <0x2 0x16 0x2 0xb5 0x2 0x15 0x3 0xb5>;
				phandle = <0x95>;
			};
		};
		uart9 {

			uart9m0-xfer {

				rockchip,pins = <0x2 0x7 0x3 0xb5 0x2 0x8 0x3 0xb5>;
				phandle = <0x96>;
			};
		};
		vop {

		};
		spi0-hs {

		};
		spi1-hs {

		};
		spi2-hs {

		};
		spi3-hs {

		};
		gmac-txd-level3 {

		};
		gmac-txc-level2 {

		};
		bt {

			bt-enable-h {

				rockchip,pins = <0x2 0xf 0x0 0xb3>;
				phandle = <0x8d>;
			};
			bt-host-wake-l {

				rockchip,pins = <0x2 0x10 0x0 0xbb>;
				phandle = <0x8b>;
			};
			bt-wake-l {

				rockchip,pins = <0x2 0x11 0x0 0xb3>;
				phandle = <0x8c>;
			};
		};
		fan {

			fan-en-h {

				rockchip,pins = <0x0 0x1d 0x0 0xb3>;
				phandle = <0xbc>;
			};
		};
		leds {

			work-led-enable-h {

				rockchip,pins = <0x0 0x1b 0x0 0xb3>;
				phandle = <0xbe>;
			};
			diy-led-enable-h {

				rockchip,pins = <0x0 0x1c 0x0 0xb3>;
				phandle = <0xbf>;
			};
		};
		pcie {

			pcie-enable-h {

				rockchip,pins = <0x0 0x16 0x0 0xb3>;
				phandle = <0xc5>;
			};
			pcie-reset-h {

				rockchip,pins = <0x1 0xa 0x0 0xb3>;
				phandle = <0x5d>;
			};
		};
		usb2 {

			vcc5v0-usb20-host-en {

				rockchip,pins = <0x4 0xd 0x0 0xb3>;
				phandle = <0xc7>;
			};
		};
		sdio-pwrseq {

			wifi-enable-h {

				rockchip,pins = <0x2 0x12 0x0 0xb3>;
				phandle = <0xc1>;
			};
		};
		vcc_sd {

			vcc-sd-h {

				rockchip,pins = <0x0 0x5 0x0 0xb3>;
				phandle = <0xc9>;
			};
		};
	};
	chosen {

		fixup-applied;
		stdout-path = "serial2:115200n8";
	};
	external-gmac1-clock {

		compatible = "fixed-clock";
		clock-frequency = <0x7735940>;
		clock-output-names = "gmac1_clkin";
		#clock-cells = <0x0>;
		phandle = <0x4a>;
	};
	gpio_fan {

		compatible = "gpio-fan";
		gpios = <0x22 0x1d 0x0>;
		gpio-fan,speed-map = <0x0 0x0 0x1194 0x1>;
		pinctrl-names = "default";
		pinctrl-0 = <0xbc>;
		#cooling-cells = <0x2>;
		phandle = <0x9a>;
	};
	hdmi-con {

		compatible = "hdmi-connector";
		type = "a";
		port {

			endpoint {

				remote-endpoint = <0xbd>;
				phandle = <0x5b>;
			};
		};
	};
	leds {

		compatible = "gpio-leds";
		led-work {

			label = "work-led";
			default-state = "off";
			gpios = <0x22 0x1b 0x0>;
			pinctrl-names = "default";
			pinctrl-0 = <0xbe>;
			retain-state-suspended;
		};
		led-diy {

			label = "diy-led";
			default-state = "on";
			gpios = <0x22 0x1c 0x0>;
			linux,default-trigger = "heartbeat";
			pinctrl-names = "default";
			pinctrl-0 = <0xbf>;
			retain-state-suspended;
		};
	};
	rk817-sound {

		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,name = "Analog RK817";
		simple-audio-card,mclk-fs = <0x100>;
		simple-audio-card,cpu {

			sound-dai = <0xc0>;
		};
		simple-audio-card,codec {

			sound-dai = <0x89>;
		};
	};
	sdio-pwrseq {

		compatible = "mmc-pwrseq-simple";
		clocks = <0x89 0x1>;
		clock-names = "ext_clock";
		pinctrl-names = "default";
		pinctrl-0 = <0xc1>;
		post-power-on-delay-ms = <0x64>;
		power-off-delay-us = <0x4c4b40>;
		reset-gpios = <0x8a 0x12 0x1>;
		phandle = <0x65>;
	};
	spdif-dit {

		compatible = "linux,spdif-dit";
		#sound-dai-cells = <0x0>;
		phandle = <0xc3>;
	};
	spdif-sound {

		compatible = "simple-audio-card";
		simple-audio-card,name = "SPDIF";
		simple-audio-card,cpu {

			sound-dai = <0xc2>;
		};
		simple-audio-card,codec {

			sound-dai = <0xc3>;
		};
	};
	vcc12v_dcin {

		compatible = "regulator-fixed";
		regulator-name = "vcc12v_dcin";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <0xb71b00>;
		regulator-max-microvolt = <0xb71b00>;
		phandle = <0xc4>;
	};
	vbus {

		compatible = "regulator-fixed";
		regulator-name = "vbus";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		vin-supply = <0xc4>;
		phandle = <0xca>;
	};
	vcc3v3-pcie-p-regulator {

		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <0x22 0x16 0x0>;
		pinctrl-names = "default";
		pinctrl-0 = <0xc5>;
		regulator-name = "vcc3v3_pcie_p";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		vin-supply = <0x1b>;
		phandle = <0x5f>;
	};
	vcc5v0_usb {

		compatible = "regulator-fixed";
		regulator-name = "vcc5v0_usb";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		vin-supply = <0xc4>;
		phandle = <0xc8>;
	};
	vcc5v0_usb20_host {

		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <0xc6 0xd 0x0>;
		pinctrl-names = "default";
		pinctrl-0 = <0xc7>;
		regulator-name = "vcc5v0_usb20_host";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		vin-supply = <0xc8>;
		phandle = <0xaf>;
	};
	vcc5v0_usb20_otg {

		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <0xc6 0xd 0x0>;
		regulator-name = "vcc5v0_usb20_otg";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		vin-supply = <0x25>;
		phandle = <0xb0>;
	};
	vcc3v3_sd {

		compatible = "regulator-fixed";
		gpio = <0x22 0x5 0x1>;
		pinctrl-names = "default";
		pinctrl-0 = <0xc9>;
		regulator-boot-on;
		regulator-name = "vcc3v3_sd";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		vin-supply = <0x1b>;
		phandle = <0x64>;
	};
	vcc_sys {

		compatible = "regulator-fixed";
		regulator-name = "vcc_sys";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <0x432380>;
		regulator-max-microvolt = <0x432380>;
		vin-supply = <0xca>;
		phandle = <0x21>;
	};
	vcc_wl {

		compatible = "regulator-fixed";
		regulator-name = "vcc_wl";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		vin-supply = <0x21>;
		phandle = <0x69>;
	};
};