Index: share/man/man4/amdtemp.4 =================================================================== --- share/man/man4/amdtemp.4 (revision 224468) +++ share/man/man4/amdtemp.4 (working copy) @@ -25,12 +25,14 @@ .\" .\" $FreeBSD$ .\" -.Dd April 8, 2008 +.Dd August 1, 2011 .Dt AMDTEMP 4 .Os .Sh NAME .Nm amdtemp -.Nd device driver for AMD K8, K10 and K11 on-die digital thermal sensor +.Nd device driver for +.Tn AMD +processor on-die digital thermal sensor .Sh SYNOPSIS To compile this driver into the kernel, place the following line in your @@ -49,25 +51,38 @@ amdtemp_load="YES" The .Nm driver provides support for the on-die digital thermal sensor present -in AMD K8, K10 and K11 processors. +in +.Tn AMD +Family 0Fh, 10h, 11h, 12h, and 14h processors. .Pp -For the K8 family, the +For Family 0Fh processors, the .Nm -driver reports each core's temperature through a sysctl node in the -corresponding CPU devices's sysctl tree, named -.Va dev.amdtemp.%d.sensor{0,1}.core{0,1} . +driver reports each core's temperature through sysctl nodes, named +.Va dev.amdtemp.%d.core{0,1}.sensor{0,1} . The driver also creates .Va dev.cpu.%d.temperature -displaying the maximum temperature of the two sensors -located in each CPU core. +in the corresponding CPU device's sysctl tree, displaying the maximum +temperature of the two sensors located in each CPU core. .Pp -For the K10 and K11 families, the driver creates +For Family 10h, 11h, 12h, and 14h processors, the driver reports each +package's temperature through a sysctl node, named +.Va dev.amdtemp.%d.core0.sensor0 . +The driver also creates .Va dev.cpu.%d.temperature -with the temperature of each core. -.Sh BUGS -AMD K9 is not supported because temperature reporting has been replaced -by Maltese. +in the corresponding CPU device's sysctl tree, displaying the temperature +of the shared sensor located in each CPU package. +.Sh SYSCTL VARIABLES +The following variable is available as both +.Xr sysctl 8 +variable and +.Xr loader 8 +tunable: +.Bl -tag -width indent +.It Va dev.amdtemp.%d.sensor_offset +.El +Add the given offset to the temperature of the sensor. Default is 0. .Sh SEE ALSO +.Xr loader 8 , .Xr sysctl 8 .Sh HISTORY The @@ -77,3 +92,19 @@ driver first appeared in .Sh AUTHORS .An Rui Paulo Aq rpaulo@FreeBSD.org .An Norikatsu Shigemura Aq nork@FreeBSD.org +.An Jung-uk Kim Aq jkim@FreeBSD.org +.Sh CAVEATS +For Family 10h and later processors, +.Do +(the reported temperature) is a non-physical temperature measured on +an arbitrary scale and it does not represent an actual physical +temperature like die or case temperature. Instead, it specifies +the processor temperature relative to the point at which the system +must supply the maximum cooling for the processor's specified maximum +case temperature and maximum thermal power dissipation +.Dc +according to +.Rs +.%T BIOS and Kernel Developer's Guide (BKDG) for AMD Processors +.%U http://developer.amd.com/documentation/guides/Pages/default.aspx +.Re Index: sys/dev/amdtemp/amdtemp.c =================================================================== --- sys/dev/amdtemp/amdtemp.c (revision 224468) +++ sys/dev/amdtemp/amdtemp.c (working copy) @@ -1,6 +1,7 @@ /*- * Copyright (c) 2008, 2009 Rui Paulo * Copyright (c) 2009 Norikatsu Shigemura + * Copyright (c) 2009-2011 Jung-uk Kim * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,8 +27,8 @@ */ /* - * Driver for the AMD K8/K10/K11 thermal sensors. Initially based on the - * k8temp Linux driver. + * Driver for the AMD CPU on-die thermal sensors. + * Initially based on the k8temp Linux driver. */ #include @@ -35,43 +36,47 @@ __FBSDID("$FreeBSD$"); #include #include -#include -#include -#include #include #include +#include #include +#include -#include #include #include +#include +#include -#include #include typedef enum { - SENSOR0_CORE0, - SENSOR0_CORE1, - SENSOR1_CORE0, - SENSOR1_CORE1, + CORE0_SENSOR0, + CORE0_SENSOR1, + CORE1_SENSOR0, + CORE1_SENSOR1, CORE0, CORE1 } amdsensor_t; struct amdtemp_softc { device_t sc_dev; - int sc_temps[4]; + int sc_ncores; int sc_ntemps; - struct sysctl_oid *sc_oid; - struct sysctl_oid *sc_sysctl_cpu[2]; + int sc_flags; +#define AMDTEMP_FLAG_CS_SWAP 0x01 /* ThermSenseCoreSel is inverted. */ +#define AMDTEMP_FLAG_CT_10BIT 0x02 /* CurTmp is 10-bit wide. */ +#define AMDTEMP_FLAG_ALT_OFFSET 0x04 /* CurTmp starts at -28C. */ + int32_t sc_offset; + int32_t (*sc_gettemp)(device_t, amdsensor_t); + struct sysctl_oid *sc_sysctl_cpu[MAXCPU]; struct intr_config_hook sc_ich; - int32_t (*sc_gettemp)(device_t, amdsensor_t); }; -#define VENDORID_AMD 0x1022 -#define DEVICEID_AMD_MISC0F 0x1103 -#define DEVICEID_AMD_MISC10 0x1203 -#define DEVICEID_AMD_MISC11 0x1303 +#define VENDORID_AMD 0x1022 +#define DEVICEID_AMD_MISC0F 0x1103 +#define DEVICEID_AMD_MISC10 0x1203 +#define DEVICEID_AMD_MISC11 0x1303 +#define DEVICEID_AMD_MISC14 0x1703 static struct amdtemp_product { uint16_t amdtemp_vendorid; @@ -80,26 +85,32 @@ static struct amdtemp_product { { VENDORID_AMD, DEVICEID_AMD_MISC0F }, { VENDORID_AMD, DEVICEID_AMD_MISC10 }, { VENDORID_AMD, DEVICEID_AMD_MISC11 }, + { VENDORID_AMD, DEVICEID_AMD_MISC14 }, { 0, 0 } }; /* - * Register control (K8 family) + * Reported Temperature Control Register */ -#define AMDTEMP_REG0F 0xe4 -#define AMDTEMP_REG_SELSENSOR 0x40 -#define AMDTEMP_REG_SELCORE 0x04 +#define AMDTEMP_REPTMP_CTRL 0xa4 /* - * Register control (K10 & K11) family + * Thermaltrip Status Register */ -#define AMDTEMP_REG 0xa4 +#define AMDTEMP_THERMTP_STAT 0xe4 +#define AMDTEMP_TTSR_SELCORE 0x04 /* Family 0Fh only */ +#define AMDTEMP_TTSR_SELSENSOR 0x40 /* Family 0Fh only */ -#define TZ_ZEROC 2732 +/* + * DRAM Configuration High Register + */ +#define AMDTEMP_DRAM_CONF_HIGH 0x94 /* Function 2 */ +#define AMDTEMP_DRAM_MODE_DDR3 0x0100 - /* -49 C is the mininum temperature */ -#define AMDTEMP_OFFSET0F (TZ_ZEROC-490) -#define AMDTEMP_OFFSET (TZ_ZEROC) +/* + * CPU Family/Model Register + */ +#define AMDTEMP_CPUID 0xfc /* * Device methods. @@ -138,8 +149,8 @@ amdtemp_match(device_t dev) { int i; uint16_t vendor, devid; - - vendor = pci_get_vendor(dev); + + vendor = pci_get_vendor(dev); devid = pci_get_device(dev); for (i = 0; amdtemp_products[i].amdtemp_vendorid != 0; i++) { @@ -159,219 +170,376 @@ amdtemp_identify(driver_t *driver, device_t parent /* Make sure we're not being doubly invoked. */ if (device_find_child(parent, "amdtemp", -1) != NULL) return; - + if (amdtemp_match(parent)) { child = device_add_child(parent, "amdtemp", -1); if (child == NULL) device_printf(parent, "add amdtemp child failed\n"); } - } static int amdtemp_probe(device_t dev) { - uint32_t regs[4]; - + uint32_t family, model; + if (resource_disabled("amdtemp", 0)) return (ENXIO); - do_cpuid(1, regs); - switch (regs[0]) { - case 0xf40: - case 0xf50: - case 0xf51: + family = CPUID_TO_FAMILY(cpu_id); + model = CPUID_TO_MODEL(cpu_id); + + switch (family) { + case 0x0f: + if ((model == 0x04 && (cpu_id & CPUID_STEPPING) == 0) || + (model == 0x05 && (cpu_id & CPUID_STEPPING) <= 1)) + return (ENXIO); + break; + case 0x10: + case 0x11: + case 0x12: + case 0x14: + break; + default: return (ENXIO); } - device_set_desc(dev, "AMD K8 Thermal Sensors"); - + device_set_desc(dev, "AMD CPU On-Die Thermal Sensors"); + return (BUS_PROBE_GENERIC); } static int amdtemp_attach(device_t dev) { + char tn[32]; + u_int regs[4]; struct amdtemp_softc *sc = device_get_softc(dev); struct sysctl_ctx_list *sysctlctx; struct sysctl_oid *sysctlnode; + uint32_t cpuid, family, model; + u_int bid; + int erratum319, unit; + erratum319 = 0; /* - * Setup intrhook function to create dev.cpu sysctl entries. This is - * needed because the cpu driver may be loaded late on boot, after - * us. + * CPUID Register is available from Revision F. */ - sc->sc_ich.ich_func = amdtemp_intrhook; - sc->sc_ich.ich_arg = dev; - if (config_intrhook_establish(&sc->sc_ich) != 0) { - device_printf(dev, "config_intrhook_establish " - "failed!\n"); - return (ENXIO); + cpuid = cpu_id; + family = CPUID_TO_FAMILY(cpuid); + model = CPUID_TO_MODEL(cpuid); + if (family != 0x0f || model >= 0x40) { + cpuid = pci_read_config(dev, AMDTEMP_CPUID, 4); + family = CPUID_TO_FAMILY(cpuid); + model = CPUID_TO_MODEL(cpuid); } - - if (pci_get_device(dev) == DEVICEID_AMD_MISC0F) + + switch (family) { + case 0x0f: + /* + * Thermaltrip Status Register + * + * - ThermSenseCoreSel + * + * Revision F & G: 0 - Core1, 1 - Core0 + * Other: 0 - Core0, 1 - Core1 + * + * - CurTmp + * + * Revision G: bits 23-14 + * Other: bits 23-16 + * + * XXX According to the BKDG, CurTmp, ThermSenseSel and + * ThermSenseCoreSel bits were introduced in Revision F + * but CurTmp seems working fine as early as Revision C. + * However, it is not clear whether ThermSenseSel and/or + * ThermSenseCoreSel work in undocumented cases as well. + * In fact, the Linux driver suggests it may not work but + * we just assume it does until we find otherwise. + * + * XXX According to Linux, CurTmp starts at -28C on + * Socket AM2 Revision G processors, which is not + * documented anywhere. + */ + if (model >= 0x40) + sc->sc_flags |= AMDTEMP_FLAG_CS_SWAP; + if (model >= 0x60 && model != 0xc1) { + do_cpuid(0x80000001, regs); + bid = (regs[1] >> 9) & 0x1f; + switch (model) { + case 0x68: /* Socket S1g1 */ + case 0x6c: + case 0x7c: + break; + case 0x6b: /* Socket AM2 and ASB1 (2 cores) */ + if (bid != 0x0b && bid != 0x0c) + sc->sc_flags |= + AMDTEMP_FLAG_ALT_OFFSET; + break; + case 0x6f: /* Socket AM2 and ASB1 (1 core) */ + case 0x7f: + if (bid != 0x07 && bid != 0x09 && + bid != 0x0c) + sc->sc_flags |= + AMDTEMP_FLAG_ALT_OFFSET; + break; + default: + sc->sc_flags |= AMDTEMP_FLAG_ALT_OFFSET; + } + sc->sc_flags |= AMDTEMP_FLAG_CT_10BIT; + } + + /* + * There are two sensors per core. + */ + sc->sc_ntemps = 2; + sc->sc_gettemp = amdtemp_gettemp0f; - else { + break; + case 0x10: + /* + * Erratum 319 Inaccurate Temperature Measurement + * + * http://support.amd.com/us/Processor_TechDocs/41322.pdf + */ + do_cpuid(0x80000001, regs); + switch ((regs[1] >> 28) & 0xf) { + case 0: /* Socket F */ + erratum319 = 1; + break; + case 1: /* Socket AM2+ or AM3 */ + if ((pci_cfgregread(pci_get_bus(dev), + pci_get_slot(dev), 2, AMDTEMP_DRAM_CONF_HIGH, 2) & + AMDTEMP_DRAM_MODE_DDR3) != 0 || model > 0x04 || + (model == 0x04 && (cpuid & CPUID_STEPPING) >= 3)) + break; + /* XXX 00100F42h (RB-C2) exists in both formats. */ + erratum319 = 1; + break; + } + /* FALLTHROUGH */ + case 0x11: + case 0x12: + case 0x14: + /* + * There is only one sensor per package. + */ + sc->sc_ntemps = 1; + sc->sc_gettemp = amdtemp_gettemp; - return (0); + break; } + /* Find number of cores per package. */ + sc->sc_ncores = (amd_feature2 & AMDID2_CMP) != 0 ? + (cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1; + if (sc->sc_ncores > MAXCPU) + return (ENXIO); + + if (erratum319) + device_printf(dev, + "Erratum 319: temperature measurement may be inaccurate\n"); + if (bootverbose) + device_printf(dev, "Found %d cores and %d sensors.\n", + sc->sc_ncores, + sc->sc_ntemps > 1 ? sc->sc_ntemps * sc->sc_ncores : 1); + /* * dev.amdtemp.N tree. */ + unit = device_get_unit(dev); + snprintf(tn, sizeof(tn), "dev.amdtemp.%d.sensor_offset", unit); + TUNABLE_INT_FETCH(tn, &sc->sc_offset); + sysctlctx = device_get_sysctl_ctx(dev); + SYSCTL_ADD_INT(sysctlctx, + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, + "sensor_offset", CTLFLAG_RW, &sc->sc_offset, 0, + "Temperature sensor offset"); sysctlnode = SYSCTL_ADD_NODE(sysctlctx, - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "sensor0", - CTLFLAG_RD, 0, "Sensor 0"); - + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, + "core0", CTLFLAG_RD, 0, "Core 0"); + SYSCTL_ADD_PROC(sysctlctx, SYSCTL_CHILDREN(sysctlnode), - OID_AUTO, "core0", CTLTYPE_INT | CTLFLAG_RD, - dev, SENSOR0_CORE0, amdtemp_sysctl, "IK", - "Sensor 0 / Core 0 temperature"); - - SYSCTL_ADD_PROC(sysctlctx, - SYSCTL_CHILDREN(sysctlnode), - OID_AUTO, "core1", CTLTYPE_INT | CTLFLAG_RD, - dev, SENSOR0_CORE1, amdtemp_sysctl, "IK", - "Sensor 0 / Core 1 temperature"); - - sysctlnode = SYSCTL_ADD_NODE(sysctlctx, - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "sensor1", - CTLFLAG_RD, 0, "Sensor 1"); - - SYSCTL_ADD_PROC(sysctlctx, - SYSCTL_CHILDREN(sysctlnode), - OID_AUTO, "core0", CTLTYPE_INT | CTLFLAG_RD, - dev, SENSOR1_CORE0, amdtemp_sysctl, "IK", - "Sensor 1 / Core 0 temperature"); - - SYSCTL_ADD_PROC(sysctlctx, - SYSCTL_CHILDREN(sysctlnode), - OID_AUTO, "core1", CTLTYPE_INT | CTLFLAG_RD, - dev, SENSOR1_CORE1, amdtemp_sysctl, "IK", - "Sensor 1 / Core 1 temperature"); + OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD, + dev, CORE0_SENSOR0, amdtemp_sysctl, "IK", + "Core 0 / Sensor 0 temperature"); + if (sc->sc_ntemps > 1) { + SYSCTL_ADD_PROC(sysctlctx, + SYSCTL_CHILDREN(sysctlnode), + OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD, + dev, CORE0_SENSOR1, amdtemp_sysctl, "IK", + "Core 0 / Sensor 1 temperature"); + + if (sc->sc_ncores > 1) { + sysctlnode = SYSCTL_ADD_NODE(sysctlctx, + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), + OID_AUTO, "core1", CTLFLAG_RD, 0, "Core 1"); + + SYSCTL_ADD_PROC(sysctlctx, + SYSCTL_CHILDREN(sysctlnode), + OID_AUTO, "sensor0", CTLTYPE_INT | CTLFLAG_RD, + dev, CORE1_SENSOR0, amdtemp_sysctl, "IK", + "Core 1 / Sensor 0 temperature"); + + SYSCTL_ADD_PROC(sysctlctx, + SYSCTL_CHILDREN(sysctlnode), + OID_AUTO, "sensor1", CTLTYPE_INT | CTLFLAG_RD, + dev, CORE1_SENSOR1, amdtemp_sysctl, "IK", + "Core 1 / Sensor 1 temperature"); + } + } + + /* + * Try to create dev.cpu sysctl entries and setup intrhook function. + * This is needed because the cpu driver may be loaded late on boot, + * after us. + */ + amdtemp_intrhook(dev); + sc->sc_ich.ich_func = amdtemp_intrhook; + sc->sc_ich.ich_arg = dev; + if (config_intrhook_establish(&sc->sc_ich) != 0) { + device_printf(dev, "config_intrhook_establish failed!\n"); + return (ENXIO); + } + return (0); } void amdtemp_intrhook(void *arg) { - int i; - device_t nexus, acpi, cpu; - device_t dev = (device_t) arg; struct amdtemp_softc *sc; struct sysctl_ctx_list *sysctlctx; + device_t dev = (device_t)arg; + device_t acpi, cpu, nexus; + amdsensor_t sensor; + int i; sc = device_get_softc(dev); - + /* * dev.cpu.N.temperature. */ nexus = device_find_child(root_bus, "nexus", 0); acpi = device_find_child(nexus, "acpi", 0); - for (i = 0; i < 2; i++) { + for (i = 0; i < sc->sc_ncores; i++) { + if (sc->sc_sysctl_cpu[i] != NULL) + continue; cpu = device_find_child(acpi, "cpu", - device_get_unit(dev) * 2 + i); - if (cpu) { + device_get_unit(dev) * sc->sc_ncores + i); + if (cpu != NULL) { sysctlctx = device_get_sysctl_ctx(cpu); + sensor = sc->sc_ntemps > 1 ? + (i == 0 ? CORE0 : CORE1) : CORE0_SENSOR0; sc->sc_sysctl_cpu[i] = SYSCTL_ADD_PROC(sysctlctx, SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)), OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD, - dev, CORE0, amdtemp_sysctl, "IK", - "Max of sensor 0 / 1"); + dev, sensor, amdtemp_sysctl, "IK", + "Current temparature"); } } - config_intrhook_disestablish(&sc->sc_ich); + if (sc->sc_ich.ich_arg != NULL) + config_intrhook_disestablish(&sc->sc_ich); } int amdtemp_detach(device_t dev) { + struct amdtemp_softc *sc = device_get_softc(dev); int i; - struct amdtemp_softc *sc = device_get_softc(dev); - - for (i = 0; i < 2; i++) { - if (sc->sc_sysctl_cpu[i]) + + for (i = 0; i < sc->sc_ncores; i++) + if (sc->sc_sysctl_cpu[i] != NULL) sysctl_remove_oid(sc->sc_sysctl_cpu[i], 1, 0); - } /* NewBus removes the dev.amdtemp.N tree by itself. */ - + return (0); } static int amdtemp_sysctl(SYSCTL_HANDLER_ARGS) { - device_t dev = (device_t) arg1; + device_t dev = (device_t)arg1; struct amdtemp_softc *sc = device_get_softc(dev); + amdsensor_t sensor = (amdsensor_t)arg2; + int32_t auxtemp[2], temp; int error; - int32_t temp, auxtemp[2]; - switch (arg2) { + switch (sensor) { case CORE0: - auxtemp[0] = sc->sc_gettemp(dev, SENSOR0_CORE0); - auxtemp[1] = sc->sc_gettemp(dev, SENSOR1_CORE0); + auxtemp[0] = sc->sc_gettemp(dev, CORE0_SENSOR0); + auxtemp[1] = sc->sc_gettemp(dev, CORE0_SENSOR1); temp = imax(auxtemp[0], auxtemp[1]); break; case CORE1: - auxtemp[0] = sc->sc_gettemp(dev, SENSOR0_CORE1); - auxtemp[1] = sc->sc_gettemp(dev, SENSOR1_CORE1); + auxtemp[0] = sc->sc_gettemp(dev, CORE1_SENSOR0); + auxtemp[1] = sc->sc_gettemp(dev, CORE1_SENSOR1); temp = imax(auxtemp[0], auxtemp[1]); break; default: - temp = sc->sc_gettemp(dev, arg2); + temp = sc->sc_gettemp(dev, sensor); break; } error = sysctl_handle_int(oidp, &temp, 0, req); - + return (error); } +#define AMDTEMP_ZERO_C_TO_K 2732 + static int32_t amdtemp_gettemp0f(device_t dev, amdsensor_t sensor) { - uint8_t cfg; - uint32_t temp; - - cfg = pci_read_config(dev, AMDTEMP_REG0F, 1); + struct amdtemp_softc *sc = device_get_softc(dev); + uint32_t mask, offset, temp; + + /* Set Sensor/Core selector. */ + temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 1); + temp &= ~(AMDTEMP_TTSR_SELCORE | AMDTEMP_TTSR_SELSENSOR); switch (sensor) { - case SENSOR0_CORE0: - cfg &= ~(AMDTEMP_REG_SELSENSOR | AMDTEMP_REG_SELCORE); + case CORE0_SENSOR1: + temp |= AMDTEMP_TTSR_SELSENSOR; + /* FALLTHROUGH */ + case CORE0_SENSOR0: + case CORE0: + if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) != 0) + temp |= AMDTEMP_TTSR_SELCORE; break; - case SENSOR0_CORE1: - cfg &= ~AMDTEMP_REG_SELSENSOR; - cfg |= AMDTEMP_REG_SELCORE; + case CORE1_SENSOR1: + temp |= AMDTEMP_TTSR_SELSENSOR; + /* FALLTHROUGH */ + case CORE1_SENSOR0: + case CORE1: + if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) == 0) + temp |= AMDTEMP_TTSR_SELCORE; break; - case SENSOR1_CORE0: - cfg &= ~AMDTEMP_REG_SELCORE; - cfg |= AMDTEMP_REG_SELSENSOR; - break; - case SENSOR1_CORE1: - cfg |= (AMDTEMP_REG_SELSENSOR | AMDTEMP_REG_SELCORE); - break; - default: - cfg = 0; - break; } - pci_write_config(dev, AMDTEMP_REG0F, cfg, 1); - temp = pci_read_config(dev, AMDTEMP_REG0F, 4); - temp = ((temp >> 16) & 0xff) * 10 + AMDTEMP_OFFSET0F; - + pci_write_config(dev, AMDTEMP_THERMTP_STAT, temp, 1); + + mask = (sc->sc_flags & AMDTEMP_FLAG_CT_10BIT) != 0 ? 0x3ff : 0x3fc; + offset = (sc->sc_flags & AMDTEMP_FLAG_ALT_OFFSET) != 0 ? 28 : 49; + temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 4); + temp = ((temp >> 14) & mask) * 5 / 2; + temp += AMDTEMP_ZERO_C_TO_K + (sc->sc_offset - offset) * 10; + return (temp); } static int32_t amdtemp_gettemp(device_t dev, amdsensor_t sensor) { + struct amdtemp_softc *sc = device_get_softc(dev); uint32_t temp; - temp = pci_read_config(dev, AMDTEMP_REG, 4); - temp = ((temp >> 21) & 0x3ff) * 10 / 8 + AMDTEMP_OFFSET; + temp = pci_read_config(dev, AMDTEMP_REPTMP_CTRL, 4); + temp = ((temp >> 21) & 0x7ff) * 5 / 4; + temp += AMDTEMP_ZERO_C_TO_K + sc->sc_offset * 10; return (temp); }