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Introduction

Interrupts are an important part of device support in modern machines. They allow system software to use event-driven algorithms instead of polling. This in turn can allow for much more efficient use of system resources such as CPU time, especially in systems with multiple devices operating concurrently.

One of the tasks an operating system must perform when handling device interrupts is to determine which device needs attention when an interrupt is asserted. This mapping can be done several different ways. Some systems may include this mapping information in a static table hard-coded into the operating system or firmware. Other systems may use dynamic mappings with programmable hardware, and still other systems may use a combination.

PCI allows devices to assert interrupts in two very different styles. The first style consists of dedicated sideband signals and is known as Legacy INTx interrupts. The second style consists of special memory writes that are sent over the data bus just like DMA operations and is known as Message Signaled Interrupts (MSI). MSI interrupts are only available on newer devices as it is a recent addition to the PCI standards.

First, however, a brief segue into nomenclature. In PCI, the term ``device'' actually refers to a piece of hardware that contains from one to eight ``functions''. A typical x86 chipset may include several USB controllers as functions of a single PCI device for example. A PCI expansion slot is a PCI device, and a single expansion card may contain multiple functions. However, from the operating system's perspective, each function on a PCI device is a logical operating system device. For example, on both Darwin and FreeBSD, each function of a multi-function PCI device receives its own device object and can be served by different drivers. To attempt to avoid confusion, the rest of this paper will use the term ``slot'' for a PCI device and will only use ``device'' to refer to a logical operating system device.


next up previous
Next: Legacy PCI INTx Interrupts Up: PCI Interrupts for x86 Previous: PCI Interrupts for x86