Support for PAE and >4G ram on x86 Jake Burkholder jake@FreeBSD.org

This project is being developed in the perforce repository, on the jake_pae and jake_pae_test branches.

Support for PAE is mostly complete, and has been checked into the jake_pae branch. The approach that is being taken to add support for PAE is to allow the pmap module to view the page table directory as 4 pages instead of 1, and to avoid using the 3rd level structure, the page directory pointer table, as much as possible. Due to its small size, 32 bytes, the PDPT cannot be uniformly recursively mapped, and as such does not provide a regular multi level structure like the page tables used by the alpha or x86-64 architectures. What remains to be done for PAE support is to develop an API for manipulating page table entries which will allow idempotent 64 bit loads and stores to be used where necessary.

Experimental support for >4G ram using PAE has been developed and checked into the jake_pae_test branch. This involved adding a physical address type separate from virtual addresses, for use by the vm system and bus code which needs to use physical addresses directly. Initial testing has shown good results with device drivers that can dma to 64 bit physical addresses.

Funding for this project is being provided by DARPA and Network Associate Laboratories, and hardware support by FreeBSD Systems.