Index: smp.4
===================================================================
--- smp.4	(revision 191846)
+++ smp.4	(working copy)
@@ -23,7 +23,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd December 17, 2004
+.Dd May 7, 2008
 .Dt SMP 4
 .Os
 .Sh NAME
@@ -69,12 +69,63 @@
 Setting a bit to 1 will result in the corresponding CPU being
 disabled.
 .Pp
+The
+.Xr sched_ule 4
+scheduler implements CPU topology detection and adjusts the scheduling
+algorithms to make better use of modern multi-core CPUs.
+The sysctl variable
+.Va kern.sched.topology_spec
+reflects the detected CPU hardware in a parsable XML format.
+The top level XML tag is <groups>, which encloses one or more <group> tags
+containing data about individual CPU groups.
+A CPU group contains CPUs that are detected to be "close" together, usually
+by being cores in a single multi-core processor.
+Attributes available in a <group> tag are "level", corresponding to the
+nesting level of the CPU group and "cache-level", corresponding to the
+level of CPU caches shared by the CPUs in the group.
+The <group> tag contains the <cpu> and <flags> tags.
+The <cpu> tag describes CPUs in the group.
+Its attributes are "count", corresponding to the number of CPUs in the
+group and "mask", corresponding to the integer binary mask in which
+each bit position set to 1 signifies a CPU belonging to the group.
+The contents (CDATA) of the <cpu> tag is the comma-delimited list
+of CPU indexes (derived from the "mask" attribute).
+The <flags> tag contains special tags (if any) describing the relation
+of the CPUs in the group.
+The possible flags are currently "HTT" and "SMT", corresponding to
+the various implementations of hardware multithreading.
+An example topology_spec output for a system consisting of
+two quad-core processors is:
+.Bd -literal
+<groups>
+  <group level="1" cache-level="0">
+    <cpu count="8" mask="0xff">0, 1, 2, 3, 4, 5, 6, 7</cpu>
+    <flags></flags>
+    <children>
+      <group level="2" cache-level="0">
+        <cpu count="4" mask="0xf">0, 1, 2, 3</cpu>
+        <flags></flags>
+      </group>
+      <group level="2" cache-level="0">
+        <cpu count="4" mask="0xf0">4, 5, 6, 7</cpu>
+        <flags></flags>
+      </group>
+    </children>
+  </group>
+</groups>
+.Ed
+.Pp
+This information is used internally by the kernel to schedule related
+tasks on CPUs that are closely grouped together.
+.Pp
 .Fx
-supports hyperthreading on Intel CPU's on the i386 platform.
+supports hyperthreading on Intel CPU's on the i386 and AMD64 platforms.
 Since using logical CPUs can cause performance penalties under certain loads,
 the logical CPUs can be disabled by setting the
 .Va machdep.hlt_logical_cpus
-sysctl to one.
+sysctl to one. 
+Note that this operation is different from the mechanism used by the
+.Xr cpuset 1 .
 .Sh SEE ALSO
 .Xr mptable 1 ,
 .Xr sysctl 8 ,
@@ -83,7 +134,11 @@
 .Xr mtx_pool 9 ,
 .Xr mutex 9 ,
 .Xr sema 9 ,
-.Xr sx 9
+.Xr sx 9 ,
+.Xr rwlock 9 ,
+.Xr sched_4bsd 4 ,
+.Xr sched_ule 4 ,
+.Xr cpuset 1
 .Sh HISTORY
 The
 .Nm