Index: alpha/include/bus.h
===================================================================
RCS file: /home/ncvs/src/sys/alpha/include/bus.h,v
retrieving revision 1.16
diff -u -r1.16 bus.h
--- alpha/include/bus.h	29 Jan 2003 07:25:26 -0000	1.16
+++ alpha/include/bus.h	16 Feb 2003 11:59:56 -0000
@@ -469,7 +469,7 @@
 #define	BUS_DMA_WAITOK		0x00	/* safe to sleep (pseudo-flag) */
 #define	BUS_DMA_NOWAIT		0x01	/* not safe to sleep */
 #define	BUS_DMA_ALLOCNOW	0x02	/* perform resource allocation now */
-#define	BUS_DMAMEM_NOSYNC	0x04	/* map memory to not require sync */
+#define	BUS_DMA_COHERENT	0x04	/* map memory to not require sync */
 #define	BUS_DMA_ISA		0x10	/* map memory for ISA dma */
 #define	BUS_DMA_BUS2		0x20	/* placeholders for bus functions... */
 #define	BUS_DMA_BUS3		0x40
Index: i386/include/bus_dma.h
===================================================================
RCS file: /home/ncvs/src/sys/i386/include/bus_dma.h,v
retrieving revision 1.17
diff -u -r1.17 bus_dma.h
--- i386/include/bus_dma.h	29 Jan 2003 07:25:26 -0000	1.17
+++ i386/include/bus_dma.h	18 Feb 2003 14:24:47 -0000
@@ -78,7 +78,7 @@
 #define	BUS_DMA_WAITOK		0x00	/* safe to sleep (pseudo-flag) */
 #define	BUS_DMA_NOWAIT		0x01	/* not safe to sleep */
 #define	BUS_DMA_ALLOCNOW	0x02	/* perform resource allocation now */
-#define	BUS_DMAMEM_NOSYNC	0x04	/* map memory to not require sync */
+#define	BUS_DMA_COHERENT	0x04	/* map memory to not require sync */
 #define	BUS_DMA_BUS1		0x10	/* placeholders for bus functions... */
 #define	BUS_DMA_BUS2		0x20
 #define	BUS_DMA_BUS3		0x40
Index: i4b/layer1/itjc/i4b_itjc_pci.c
===================================================================
RCS file: /home/ncvs/src/sys/i4b/layer1/itjc/i4b_itjc_pci.c,v
retrieving revision 1.6
diff -u -r1.6 i4b_itjc_pci.c
--- i4b/layer1/itjc/i4b_itjc_pci.c	15 Oct 2002 20:32:45 -0000	1.6
+++ i4b/layer1/itjc/i4b_itjc_pci.c	16 Feb 2003 12:01:23 -0000
@@ -1607,7 +1607,7 @@
 		ITJC_DMA_POOL_BYTES,			/* maxsize*/
 		1,					/* nsegments*/
 		ITJC_DMA_POOL_BYTES,			/* maxsegsz*/
-		BUS_DMA_ALLOCNOW | BUS_DMAMEM_NOSYNC,	/* flags*/
+		BUS_DMA_ALLOCNOW | BUS_DMA_COHERENT,	/* flags*/
 		&ctx->tag);
 
 	if (error)
@@ -1621,7 +1621,7 @@
         error = bus_dmamem_alloc(
 		ctx->tag, 				/* DMA tag */
 		(void **)&ctx->pool,	/* KV addr of the allocated memory */
-		BUS_DMA_NOWAIT | BUS_DMAMEM_NOSYNC,	/* flags */
+		BUS_DMA_NOWAIT | BUS_DMA_COHERENT,	/* flags */
 		&ctx->map);				/* KV <-> PCI map */
 
 	if (error)
Index: ia64/include/bus.h
===================================================================
RCS file: /home/ncvs/src/sys/ia64/include/bus.h,v
retrieving revision 1.7
diff -u -r1.7 bus.h
--- ia64/include/bus.h	5 Jan 2003 21:34:05 -0000	1.7
+++ ia64/include/bus.h	16 Feb 2003 12:02:33 -0000
@@ -1101,7 +1101,7 @@
 #define	BUS_DMA_WAITOK		0x00	/* safe to sleep (pseudo-flag) */
 #define	BUS_DMA_NOWAIT		0x01	/* not safe to sleep */
 #define	BUS_DMA_ALLOCNOW	0x02	/* perform resource allocation now */
-#define	BUS_DMAMEM_NOSYNC	0x04	/* map memory to not require sync */
+#define	BUS_DMA_COHERENT	0x04	/* map memory to not require sync */
 #define	BUS_DMA_ISA		0x10	/* map memory for ISA dma */
 #define	BUS_DMA_BUS2		0x20	/* placeholders for bus functions... */
 #define	BUS_DMA_BUS3		0x40
Index: sparc64/include/bus.h
===================================================================
RCS file: /home/ncvs/src/sys/sparc64/include/bus.h,v
retrieving revision 1.18
diff -u -r1.18 bus.h
--- sparc64/include/bus.h	29 Jan 2003 20:36:08 -0000	1.18
+++ sparc64/include/bus.h	16 Feb 2003 12:09:57 -0000
@@ -870,7 +870,7 @@
 #define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
 #define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
 #define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
-#define	BUS_DMAMEM_NOSYNC	0x004	/* map memory to not require sync */
+#define	BUS_DMA_COHERENT	0x004	/* map memory to not require sync */
 #define	BUS_DMA_NOWRITE		0x008
 #define	BUS_DMA_BUS1		0x010
 #define	BUS_DMA_BUS2		0x020
@@ -884,7 +884,6 @@
 #define	BUS_DMA_STREAMING	0x100	/* hint: sequential, unidirectional */
 #define	BUS_DMA_READ		0x200	/* mapping is device -> memory only */
 #define	BUS_DMA_WRITE		0x400	/* mapping is memory -> device only */
-#define	BUS_DMA_COHERENT	0x800	/* hint: map memory DMA coherent */
 
 #define	BUS_DMA_NOCACHE		BUS_DMA_BUS1
 /* Don't bother with alignment */