diff --git a/sys/arm64/rockchip/if_dwc_rk.c b/sys/arm64/rockchip/if_dwc_rk.c
index 7ce13d01d3e..6fbf1e04a2a 100644
--- a/sys/arm64/rockchip/if_dwc_rk.c
+++ b/sys/arm64/rockchip/if_dwc_rk.c
@@ -77,22 +77,37 @@ static void
 rk3328_set_delays(struct syscon *grf, phandle_t node)
 {
 	uint32_t tx, rx;
+	uint32_t reg;
 
 	if (OF_getencprop(node, "tx_delay", &tx, sizeof(tx)) <= 0)
 		tx = 0x30;
 	if (OF_getencprop(node, "rx_delay", &rx, sizeof(rx)) <= 0)
 		rx = 0x10;
 
-	if (bootverbose)
+	if (1)
 		printf("setting RK3328 RX/TX delays:  %d/%d\n", rx, tx);
 	tx = ((tx & RK3328_GRF_MAC_CON0_TX_MASK) <<
 	    RK3328_GRF_MAC_CON0_TX_SHIFT);
 	rx = ((rx & RK3328_GRF_MAC_CON0_TX_MASK) <<
 	    RK3328_GRF_MAC_CON0_RX_SHIFT);
 
-	SYSCON_WRITE_4(grf, RK3328_GRF_MAC_CON0, tx | rx | 0xFFFF0000);
 	SYSCON_WRITE_4(grf, RK3328_GRF_MAC_CON1, RK3328_GRF_MAC_CON1_TX_ENA | RK3328_GRF_MAC_CON1_RX_ENA | 
 	    ((RK3328_GRF_MAC_CON1_TX_ENA | RK3328_GRF_MAC_CON1_RX_ENA) << 16));
+	SYSCON_WRITE_4(grf, RK3328_GRF_MAC_CON0, tx | rx | 0xFFFF0000);
+
+	reg = SYSCON_READ_4(grf, RK3328_GRF_MAC_CON1);
+	printf(">>> RK3328_GRF_MAC_CON1 (%08x):\n", reg);
+	printf(">>>     gmac2io_gmii_clk_sel: 0x%x\n", (reg >> 11) & 3);
+	printf(">>>     gmac2io_rmii_extclk_sel: 0x%x\n", (reg >> 10) & 1);
+	printf(">>>     gmac2io_rmii_mode: 0x%x\n", (reg >> 9) & 1);
+	printf(">>>     gmac2io_rmii_clk_sel: 0x%x\n", (reg >> 7) & 1);
+	printf(">>>     gmac2io_phy_intf_sel: 0x%x\n", (reg >> 4) & 7);
+	printf(">>>     gmac2io_flowctrl: 0x%x\n", (reg >> 3) & 1);
+	printf(">>>     gmac2io_rxclk_dly_ena: 0x%x\n", (reg >> 1) & 1);
+	printf(">>>     gmac2io_txclk_dly_ena: 0x%x\n", (reg >> 0) & 1);
+
+	reg = SYSCON_READ_4(grf, RK3328_GRF_MAC_CON0);
+	printf(">>> RK3328_GRF_MAC_CON0 (%08x):\n", reg);
 }
 
 #define	RK3399_GRF_SOC_CON6		0xc218
@@ -155,6 +170,8 @@ if_dwc_rk_init(device_t dev)
 	else if (ofw_bus_is_compatible(dev, "rockchip,rk3328-gmac"))
 	    rk3328_set_delays(grf, node);
 
+
+
 	/* Mode should be set according to dtb property */
 
 	return (0);
@@ -172,7 +189,7 @@ if_dwc_rk_mii_clk(device_t dev)
 {
 
 	/* Should be calculated from the clock */
-	return (GMAC_MII_CLK_150_250M_DIV102);
+	return (GMAC_MII_CLK_100_150M_DIV62);
 }
 
 static device_method_t if_dwc_rk_methods[] = {