Index: locore.S
===================================================================
--- locore.S	(revision 244156)
+++ locore.S	(working copy)
@@ -410,11 +410,15 @@
 #endif
 
 ENTRY_NP(cpu_halt)
+#ifdef _ARM_ARCH_6
+	cpsid	if, #PSR_SVC32_MODE
+#else
 	mrs     r2, cpsr
 	bic	r2, r2, #(PSR_MODE)
 	orr     r2, r2, #(PSR_SVC32_MODE)
 	orr	r2, r2, #(I32_bit | F32_bit)
 	msr     cpsr_all, r2
+#endif
 
 	ldr	r4, .Lcpu_reset_address
 	ldr	r4, [r4]
@@ -440,8 +444,8 @@
 	 * Hurl ourselves into the ROM
 	 */
 	mov	r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
-	mcr     15, 0, r0, c1, c0, 0
-	mcrne   15, 0, r2, c8, c7, 0 	/* nail I+D TLB on ARMv4 and greater */
+	mcr     p15, 0, r0, c1, c0, 0
+	mcrne   p15, 0, r2, c8, c7, 0 	/* nail I+D TLB on ARMv4 and greater */
 	mov     pc, r4
 
 	/*