--- atheros/files.ar71xx (revision 203318) +++ atheros/files.ar71xx (local) @@ -7,6 +7,7 @@ mips/atheros/ar71xx_pci.c optional pci mips/atheros/ar71xx_pci_bus_space.c optional pci mips/atheros/ar71xx_spi.c optional ar71xx_spi +mips/atheros/pcf2123_rtc.c optional pcf2123_rtc ar71xx_spi mips/atheros/ar71xx_wdog.c optional ar71xx_wdog mips/atheros/if_arge.c optional arge mips/atheros/uart_bus_ar71xx.c optional uart --- atheros/pcf2123_rtc.c (revision 203318) +++ atheros/pcf2123_rtc.c (local) @@ -0,0 +1,204 @@ +/*- + * Copyright (c) 2010, Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include "spibus_if.h" + +#include "clock_if.h" + +#define YEAR_BASE 1970 +#define PCF2123_DELAY 50 + +struct pcf2123_rtc_softc { + device_t dev; +}; + +static int pcf2123_rtc_probe(device_t dev); +static int pcf2123_rtc_attach(device_t dev); + +static int pcf2123_rtc_gettime(device_t dev, struct timespec *ts); +static int pcf2123_rtc_settime(device_t dev, struct timespec *ts); + +static int +pcf2123_rtc_probe(device_t dev) +{ + + device_set_desc(dev, "PCF2123 SPI RTC"); + return (0); +} + +static int +pcf2123_rtc_attach(device_t dev) +{ + struct pcf2123_rtc_softc *sc; + struct spi_command cmd; + unsigned char rxBuf[3]; + unsigned char txBuf[3]; + int err; + + sc = device_get_softc(dev); + sc->dev = dev; + + clock_register(dev, 1000000); + + memset(&cmd, 0, sizeof(cmd)); + memset(rxBuf, 0, sizeof(rxBuf)); + memset(txBuf, 0, sizeof(txBuf)); + + /* Make sure Ctrl1 and Ctrl2 are zeroes */ + txBuf[0] = PCF2123_WRITE(PCF2123_REG_CTRL1); + cmd.rx_cmd = rxBuf; + cmd.tx_cmd = txBuf; + cmd.rx_cmd_sz = sizeof(rxBuf); + cmd.tx_cmd_sz = sizeof(txBuf); + err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); + DELAY(PCF2123_DELAY); + + return (0); +} + +static int +pcf2123_rtc_gettime(device_t dev, struct timespec *ts) +{ + struct clocktime ct; + struct spi_command cmd; + unsigned char rxTimedate[8]; + unsigned char txTimedate[8]; + int err; + + memset(&cmd, 0, sizeof(cmd)); + memset(rxTimedate, 0, sizeof(rxTimedate)); + memset(txTimedate, 0, sizeof(txTimedate)); + + /* + * Counter is stopped when access to time registers is in progress + * So there is no need to stop/start counter + */ + /* Start reading from seconds */ + txTimedate[0] = PCF2123_READ(PCF2123_REG_SECONDS); + cmd.rx_cmd = rxTimedate; + cmd.tx_cmd = txTimedate; + cmd.rx_cmd_sz = sizeof(rxTimedate); + cmd.tx_cmd_sz = sizeof(txTimedate); + err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); + DELAY(PCF2123_DELAY); + + ct.nsec = 0; + ct.sec = FROMBCD(rxTimedate[1] & 0x7f); + ct.min = FROMBCD(rxTimedate[2] & 0x7f); + ct.hour = FROMBCD(rxTimedate[3] & 0x3f); + + ct.dow = FROMBCD(rxTimedate[5] & 0x3f); + + ct.day = FROMBCD(rxTimedate[4] & 0x3f); + ct.mon = FROMBCD(rxTimedate[6] & 0x1f); + ct.year = YEAR_BASE + FROMBCD(rxTimedate[7]); + + return (clock_ct_to_ts(&ct, ts)); +} + +static int +pcf2123_rtc_settime(device_t dev, struct timespec *ts) +{ + struct clocktime ct; + struct pcf2123_rtc_softc *sc; + struct spi_command cmd; + unsigned char rxTimedate[8]; + unsigned char txTimedate[8]; + int err; + + sc = device_get_softc(dev); + + /* Resolution: 1 sec */ + if (ts->tv_nsec >= 500000000) + ts->tv_sec++; + ts->tv_nsec = 0; + clock_ts_to_ct(ts, &ct); + + memset(&cmd, 0, sizeof(cmd)); + memset(rxTimedate, 0, sizeof(rxTimedate)); + memset(txTimedate, 0, sizeof(txTimedate)); + + /* Start reading from seconds */ + cmd.rx_cmd = rxTimedate; + cmd.tx_cmd = txTimedate; + cmd.rx_cmd_sz = sizeof(rxTimedate); + cmd.tx_cmd_sz = sizeof(txTimedate); + + /* + * Counter is stopped when access to time registers is in progress + * So there is no need to stop/start counter + */ + txTimedate[0] = PCF2123_WRITE(PCF2123_REG_SECONDS); + txTimedate[1] = TOBCD(ct.sec); + txTimedate[2] = TOBCD(ct.min); + txTimedate[3] = TOBCD(ct.hour); + txTimedate[4] = TOBCD(ct.day); + txTimedate[5] = TOBCD(ct.dow); + txTimedate[6] = TOBCD(ct.mon); + txTimedate[7] = TOBCD(ct.year - YEAR_BASE); + + err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); + DELAY(PCF2123_DELAY); + + return (err); +} + +static device_method_t pcf2123_rtc_methods[] = { + DEVMETHOD(device_probe, pcf2123_rtc_probe), + DEVMETHOD(device_attach, pcf2123_rtc_attach), + + DEVMETHOD(clock_gettime, pcf2123_rtc_gettime), + DEVMETHOD(clock_settime, pcf2123_rtc_settime), + + { 0, 0 }, +}; + +static driver_t pcf2123_rtc_driver = { + "rtc", + pcf2123_rtc_methods, + sizeof(struct pcf2123_rtc_softc), +}; +static devclass_t pcf2123_rtc_devclass; + +DRIVER_MODULE(pcf2123_rtc, spibus, pcf2123_rtc_driver, pcf2123_rtc_devclass, 0, 0); --- atheros/pcf2123reg.h (revision 203318) +++ atheros/pcf2123reg.h (local) @@ -0,0 +1,68 @@ +/*- + * Copyright (c) 2009, Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* $FreeBSD */ + +#ifndef __PCF2123REG_H__ +#define __PCF2123REG_H__ + +/* Control and status */ +#define PCF2123_REG_CTRL1 0x0 +#define PCF2123_CTRL1_STOP (1 << 5) +#define PCF2123_REG_CTRL2 0x1 + +/* Time and date */ +#define PCF2123_REG_SECONDS 0x2 +#define PCF2123_REG_MINUTES 0x3 +#define PCF2123_REG_HOURS 0x4 +#define PCF2123_REG_DAYS 0x5 +#define PCF2123_REG_WEEKDAYS 0x6 +#define PCF2123_REG_MONTHS 0x7 +#define PCF2123_REG_YEARS 0x8 + +/* Alarm registers */ +#define PCF2123_REG_MINUTE_ALARM 0x9 +#define PCF2123_REG_HOUR_ALARM 0xA +#define PCF2123_REG_DAY_ALARM 0xB +#define PCF2123_REG_WEEKDAY_ALARM 0xC + +/* Offset */ +#define PCF2123_REG_OFFSET 0xD + +/* Timer */ +#define PCF2123_REG_TIMER_CLKOUT 0xE +#define PCF2123_REG_COUNTDOWN_TIMER 0xF + +/* Commands */ +#define PCF2123_CMD_READ (1 << 7) +#define PCF2123_CMD_WRITE (0 << 7) + +#define PCF2123_READ(reg) (PCF2123_CMD_READ | (1 << 4) | (reg)) +#define PCF2123_WRITE(reg) (PCF2123_CMD_WRITE | (1 << 4) | (reg)) + +#endif /* __PCF2123REG_H__ */ + --- conf/AR71XX (revision 203318) +++ conf/AR71XX (local) @@ -73,8 +73,9 @@ device spibus device ar71xx_spi +device pcf2123_rtc device mx25l -# device geom_redboot +device geom_redboot device ar71xx_wdog --- conf/AR71XX.hints (revision 203318) +++ conf/AR71XX.hints (local) @@ -55,5 +55,8 @@ hint.mx25l.0.at="spibus0" hint.mx25l.0.cs=0 +# hint.rtc.0.at="spibus0" +# hint.rtc.0.cs=0 + # Watchdog hint.ar71xx_wdog.0.at="nexus0"