Index: arm/arm/locore.S
===================================================================
RCS file: /home/ncvs/src/sys/arm/arm/locore.S,v
retrieving revision 1.8
diff -u -p -r1.8 locore.S
--- arm/arm/locore.S	23 Jan 2005 22:08:31 -0000	1.8
+++ arm/arm/locore.S	17 Feb 2005 01:57:45 -0000
@@ -48,6 +48,13 @@ __FBSDID("$FreeBSD: src/sys/arm/arm/loco
  */
 
 
+#define PUTC(reg)	\
+    ldr r11, =0xf01c0000; \
+    str reg, [r11]
+
+#define PUTC_HW(reg) \
+    ldr r11, =0x808c0000; \
+    str reg, [r11]
 #define	CPWAIT_BRANCH							 \
 	sub	pc, pc, #4
 
@@ -119,6 +126,10 @@ Lunmapped:
 	/* build page table from scratch */
 	ldr	r0, Lstartup_pagetable
 	adr	r4, mmu_init_table
+	adr	r0, 'a'
+	PUTC_HW(r0);
+	mov	r0, #'\n'
+	PUTC_HW(r0);
 	b	3f
 
 2:
@@ -150,6 +161,10 @@ Lunmapped:
 
 	bl	mmu_done
 mmu_done:
+	mov r0, #'b'
+	PUTC(r0);
+	mov r0, #'\n'
+	PUTC(r0);
 #endif
 	adr	r1, .Lstart
 	ldmia	r1, {r1, r2, sp}	/* Set initial stack and */
@@ -195,12 +210,11 @@ Lstartup_pagetable:
 	.word	STARTUP_PAGETABLE_ADDR
 mmu_init_table:	
 	/* fill all table VA==PA */
-	MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
 	/* map SDRAM VA==PA, WT cacheable */
 	MMU_INIT(PHYSADDR, PHYSADDR , 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
 	/* map VA 0xc0000000..0xc3ffffff to PA */
 	MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
-	MMU_INIT(0xfe800000, 0xfe800000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
+	MMU_INIT(0xf0100000, 0x80800000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
 
 	.word 0	/* end of table */
 #endif