commit 27f7d193e489fbdc2bbb6781280accf6977ba582
Author: Andriy Gapon <avg@icyb.net.ua>
Date:   Sun Jun 10 15:09:26 2012 +0300

    dtrace instruction decoder: add 0x0f 0x1f NOP opcode
    
    According to the AMD manual the whole range from 0x09 to 0x1f are NOPs.
    Intel manual mentions only 0x1f.
    
    [1] AMD64 Architecture Programmer's Manual
        Volume 3: General-Purpose and System Instructions
    [2] Software Optimization Guide for AMD Family 10h Processors
    [3] Intel(R) 64 and IA-32 Architectures Software Developer’s Manual
        Volume 2 (2A, 2B & 2C): Instruction Set Reference, A-Z

diff --git a/sys/cddl/dev/dtrace/amd64/dis_tables.c b/sys/cddl/dev/dtrace/amd64/dis_tables.c
index 5a5bc25..b753e3f 100644
--- a/sys/cddl/dev/dtrace/amd64/dis_tables.c
+++ b/sys/cddl/dev/dtrace/amd64/dis_tables.c
@@ -814,8 +814,8 @@ const instable_t dis_op0F[16][16] = {
 }, {
 /*  [10]  */	TNSZ("movups",XMMO,16),	TNSZ("movups",XMMOS,16),TNSZ("movlps",XMMO,8),	TNSZ("movlps",XMMOS,8),
 /*  [14]  */	TNSZ("unpcklps",XMMO,16),TNSZ("unpckhps",XMMO,16),TNSZ("movhps",XMMOM,8),TNSZ("movhps",XMMOMS,8),
-/*  [18]  */	IND(dis_op0F18),	INVALID,		INVALID,		INVALID,
-/*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
+/*  [18]  */	IND(dis_op0F18),	TNS("nop", M),		TNS("nop", M),		TNS("nop", M),
+/*  [1C]  */	TNS("nop", M),		TNS("nop", M),		TNS("nop", M),		TNS("nop", M),
 }, {
 /*  [20]  */	TSy("mov",SREG),	TSy("mov",SREG),	TSy("mov",SREG),	TSy("mov",SREG),
 /*  [24]  */	TSx("mov",SREG),	INVALID,		TSx("mov",SREG),	INVALID,
diff --git a/sys/cddl/dev/dtrace/i386/dis_tables.c b/sys/cddl/dev/dtrace/i386/dis_tables.c
index 5a5bc25..b753e3f 100644
--- a/sys/cddl/dev/dtrace/i386/dis_tables.c
+++ b/sys/cddl/dev/dtrace/i386/dis_tables.c
@@ -814,8 +814,8 @@ const instable_t dis_op0F[16][16] = {
 }, {
 /*  [10]  */	TNSZ("movups",XMMO,16),	TNSZ("movups",XMMOS,16),TNSZ("movlps",XMMO,8),	TNSZ("movlps",XMMOS,8),
 /*  [14]  */	TNSZ("unpcklps",XMMO,16),TNSZ("unpckhps",XMMO,16),TNSZ("movhps",XMMOM,8),TNSZ("movhps",XMMOMS,8),
-/*  [18]  */	IND(dis_op0F18),	INVALID,		INVALID,		INVALID,
-/*  [1C]  */	INVALID,		INVALID,		INVALID,		INVALID,
+/*  [18]  */	IND(dis_op0F18),	TNS("nop", M),		TNS("nop", M),		TNS("nop", M),
+/*  [1C]  */	TNS("nop", M),		TNS("nop", M),		TNS("nop", M),		TNS("nop", M),
 }, {
 /*  [20]  */	TSy("mov",SREG),	TSy("mov",SREG),	TSy("mov",SREG),	TSy("mov",SREG),
 /*  [24]  */	TSx("mov",SREG),	INVALID,		TSx("mov",SREG),	INVALID,