diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c index 3b9d747..af1aa5f 100644 --- a/sys/amd64/amd64/mp_machdep.c +++ b/sys/amd64/amd64/mp_machdep.c @@ -1708,11 +1708,11 @@ cpususpend_handler(void) ia32_pause(); } - CPU_CLR_ATOMIC(cpu, &started_cpus); - /* Resume MCA and local APIC */ mca_resume(); lapic_setup(0); + + CPU_CLR_ATOMIC(cpu, &started_cpus); } /* diff --git a/sys/amd64/include/intr_machdep.h b/sys/amd64/include/intr_machdep.h index 700e35f..8671605 100644 --- a/sys/amd64/include/intr_machdep.h +++ b/sys/amd64/include/intr_machdep.h @@ -94,7 +94,7 @@ struct pic { int (*pic_config_intr)(struct intsrc *, enum intr_trigger, enum intr_polarity); int (*pic_assign_cpu)(struct intsrc *, u_int apic_id); - STAILQ_ENTRY(pic) pics; + TAILQ_ENTRY(pic) pics; }; /* Flags for pic_disable_source() */ diff --git a/sys/dev/acpica/acpi.c b/sys/dev/acpica/acpi.c index b668097..ef941c2 100644 --- a/sys/dev/acpica/acpi.c +++ b/sys/dev/acpica/acpi.c @@ -2690,6 +2690,7 @@ acpi_EnterSleepState(struct acpi_softc *sc, int state) { register_t intr; ACPI_STATUS status; + ACPI_EVENT_STATUS power_button_status; enum acpi_sleep_state slp_state; int sleep_result; @@ -2775,7 +2776,43 @@ acpi_EnterSleepState(struct acpi_softc *sc, int state) if (state != ACPI_STATE_S1) { sleep_result = acpi_sleep_machdep(sc, state); acpi_wakeup_machdep(sc, state, sleep_result, 0); + + /* + * XXX According to ACPI specification SCI_EN bit should be restored + * by ACPI platform (BIOS, firmware) to its pre-sleep state. + * Unfortunately some BIOSes fail to do that and that leads to + * unexpected and serious consequences during wake up like a system + * getting stuck in SMI handlers. + * This hack is picked up from Linux, which claims that it follows + * Windows behavior. + */ + AcpiWriteBitRegister(ACPI_BITREG_SCI_ENABLE, ACPI_ENABLE_EVENT); + AcpiLeaveSleepStatePrep(state); + + if (sleep_result == 1 && state == ACPI_STATE_S3) { + /* + * Prevent mis-interpretation of the wakeup by power button + * as a request for power off. + * Ideally we should post an appropriate wakeup event, + * perhaps using acpi_event_power_button_wake or alike. + * + * Clearing of power button status after wakeup is mandated + * by ACPI specification in section "Fixed Power Button". + * + * XXX As of ACPICA 20121114 AcpiGetEventStatus provides + * status as 0/1 corressponding to inactive/active despite + * its type being ACPI_EVENT_STATUS. In other words, + * we should not test for ACPI_EVENT_FLAG_SET for time being. + */ + if (ACPI_SUCCESS(AcpiGetEventStatus(ACPI_EVENT_POWER_BUTTON, + &power_button_status)) && power_button_status != 0) { + AcpiClearEvent(ACPI_EVENT_POWER_BUTTON); + device_printf(sc->acpi_dev, + "cleared fixed power button status\n"); + } + } + intr_restore(intr); /* call acpi_wakeup_machdep() again with interrupt enabled */ diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c index e8fe1d0..c8f7351 100644 --- a/sys/i386/i386/mp_machdep.c +++ b/sys/i386/i386/mp_machdep.c @@ -1562,11 +1562,11 @@ cpususpend_handler(void) while (!CPU_ISSET(cpu, &started_cpus)) ia32_pause(); - CPU_CLR_ATOMIC(cpu, &started_cpus); - /* Resume MCA and local APIC */ mca_resume(); lapic_setup(0); + + CPU_CLR_ATOMIC(cpu, &started_cpus); } /* * This is called once the rest of the system is up and running and we're diff --git a/sys/i386/include/intr_machdep.h b/sys/i386/include/intr_machdep.h index 004ed52..b3dd122 100644 --- a/sys/i386/include/intr_machdep.h +++ b/sys/i386/include/intr_machdep.h @@ -94,7 +94,7 @@ struct pic { int (*pic_config_intr)(struct intsrc *, enum intr_trigger, enum intr_polarity); int (*pic_assign_cpu)(struct intsrc *, u_int apic_id); - STAILQ_ENTRY(pic) pics; + TAILQ_ENTRY(pic) pics; }; /* Flags for pic_disable_source() */ diff --git a/sys/x86/x86/intr_machdep.c b/sys/x86/x86/intr_machdep.c index 31cc80b..e21635f 100644 --- a/sys/x86/x86/intr_machdep.c +++ b/sys/x86/x86/intr_machdep.c @@ -78,7 +78,7 @@ static int intrcnt_index; static struct intsrc *interrupt_sources[NUM_IO_INTS]; static struct mtx intr_table_lock; static struct mtx intrcnt_lock; -static STAILQ_HEAD(, pic) pics; +static TAILQ_HEAD(pics_head, pic) pics; #ifdef SMP static int assign_cpu; @@ -102,7 +102,7 @@ intr_pic_registered(struct pic *pic) { struct pic *p; - STAILQ_FOREACH(p, &pics, pics) { + TAILQ_FOREACH(p, &pics, pics) { if (p == pic) return (1); } @@ -124,7 +124,7 @@ intr_register_pic(struct pic *pic) if (intr_pic_registered(pic)) error = EBUSY; else { - STAILQ_INSERT_TAIL(&pics, pic, pics); + TAILQ_INSERT_TAIL(&pics, pic, pics); error = 0; } mtx_unlock(&intr_table_lock); @@ -287,7 +287,7 @@ intr_resume(void) atpic_reset(); #endif mtx_lock(&intr_table_lock); - STAILQ_FOREACH(pic, &pics, pics) { + TAILQ_FOREACH(pic, &pics, pics) { if (pic->pic_resume != NULL) pic->pic_resume(pic); } @@ -300,7 +300,7 @@ intr_suspend(void) struct pic *pic; mtx_lock(&intr_table_lock); - STAILQ_FOREACH(pic, &pics, pics) { + TAILQ_FOREACH_REVERSE(pic, &pics, pics_head, pics) { if (pic->pic_suspend != NULL) pic->pic_suspend(pic); } @@ -381,7 +381,7 @@ intr_init(void *dummy __unused) intrcnt_setname("???", 0); intrcnt_index = 1; - STAILQ_INIT(&pics); + TAILQ_INIT(&pics); mtx_init(&intr_table_lock, "intr sources", NULL, MTX_DEF); mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN); } diff --git a/sys/x86/x86/local_apic.c b/sys/x86/x86/local_apic.c index 9b1e259..3fc2603 100644 --- a/sys/x86/x86/local_apic.c +++ b/sys/x86/x86/local_apic.c @@ -1396,11 +1396,19 @@ apic_setup_io(void *dummy __unused) if (best_enum == NULL) return; + + /* + * Local APIC must be registered before other PICs and pseudo PICs + * for proper suspend/resume order. + */ +#ifndef XEN + intr_register_pic(&lapic_pic); +#endif + retval = best_enum->apic_setup_io(); if (retval != 0) printf("%s: Failed to setup I/O APICs: returned %d\n", best_enum->apic_name, retval); - #ifdef XEN return; #endif @@ -1409,7 +1417,6 @@ apic_setup_io(void *dummy __unused) * properly program the LINT pins. */ lapic_setup(1); - intr_register_pic(&lapic_pic); if (bootverbose) lapic_dump("BSP");