Index: sys/sparc64/sparc64/machdep.c =================================================================== --- sys/sparc64/sparc64/machdep.c (revisione 240210) +++ sys/sparc64/sparc64/machdep.c (copia locale) @@ -196,11 +196,6 @@ cpu_startup(void *arg) printf("machine: %s\n", sparc64_model); cpu_identify(rdpr(ver), PCPU_GET(clock), curcpu); - - /* - * Add BSP as an interrupt target. - */ - intr_add_cpu(0); } void Index: sys/sparc64/sparc64/intr_machdep.c =================================================================== --- sys/sparc64/sparc64/intr_machdep.c (revisione 240210) +++ sys/sparc64/sparc64/intr_machdep.c (copia locale) @@ -456,7 +456,7 @@ intr_describe(int vec, void *ih, const char *descr * allocate CPUs round-robin. */ -static cpuset_t intr_cpus; +static cpuset_t intr_cpus = CPUSET_T_INITIALIZER(0x1); static int current_cpu; static void @@ -554,11 +554,4 @@ intr_shuffle_irqs(void *arg __unused) } SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs, NULL); -#else /* !SMP */ -/* Use an empty stub for compatibility. */ -void -intr_add_cpu(u_int cpu __unused) -{ - -} #endif Index: sys/sparc64/include/intr_machdep.h =================================================================== --- sys/sparc64/include/intr_machdep.h (revisione 240210) +++ sys/sparc64/include/intr_machdep.h (copia locale) @@ -91,10 +91,10 @@ struct intr_vector { extern ih_func_t *intr_handlers[]; extern struct intr_vector intr_vectors[]; +#ifdef SMP void intr_add_cpu(u_int cpu); -#ifdef SMP +#endif int intr_bind(int vec, u_char cpu); -#endif int intr_describe(int vec, void *ih, const char *descr); void intr_setup(int level, ih_func_t *ihf, int pri, iv_func_t *ivf, void *iva); Index: sys/pc98/pc98/machdep.c =================================================================== --- sys/pc98/pc98/machdep.c (revisione 240210) +++ sys/pc98/pc98/machdep.c (copia locale) @@ -273,11 +273,6 @@ cpu_startup(dummy) bufinit(); vm_pager_bufferinit(); cpu_setregs(); - - /* - * Add BSP as an interrupt target. - */ - intr_add_cpu(0); } /* Index: sys/i386/include/intr_machdep.h =================================================================== --- sys/i386/include/intr_machdep.h (revisione 240210) +++ sys/i386/include/intr_machdep.h (copia locale) @@ -131,7 +131,9 @@ int elcr_probe(void); enum intr_trigger elcr_read_trigger(u_int irq); void elcr_resume(void); void elcr_write_trigger(u_int irq, enum intr_trigger trigger); +#ifdef SMP void intr_add_cpu(u_int cpu); +#endif int intr_add_handler(const char *name, int vector, driver_filter_t filter, driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep); #ifdef SMP Index: sys/i386/i386/mp_machdep.c =================================================================== --- sys/i386/i386/mp_machdep.c (revisione 240210) +++ sys/i386/i386/mp_machdep.c (copia locale) @@ -823,6 +823,8 @@ init_secondary(void) * We tell the I/O APIC code about all the CPUs we want to receive * interrupts. If we don't want certain CPUs to receive IRQs we * can simply not tell the I/O APIC code about them in this function. + * We also do not tell it about the BSP since it tells itself about + * the BSP internally to work with UP kernels and on UP machines. */ static void set_interrupt_apic_ids(void) @@ -833,6 +835,8 @@ set_interrupt_apic_ids(void) apic_id = cpu_apic_ids[i]; if (apic_id == -1) continue; + if (cpu_info[apic_id].cpu_bsp) + continue; if (cpu_info[apic_id].cpu_disabled) continue; Index: sys/i386/i386/machdep.c =================================================================== --- sys/i386/i386/machdep.c (revisione 240210) +++ sys/i386/i386/machdep.c (copia locale) @@ -338,11 +338,6 @@ cpu_startup(dummy) #ifndef XEN cpu_setregs(); #endif - - /* - * Add BSP as an interrupt target. - */ - intr_add_cpu(0); } /* Index: sys/amd64/include/intr_machdep.h =================================================================== --- sys/amd64/include/intr_machdep.h (revisione 240210) +++ sys/amd64/include/intr_machdep.h (copia locale) @@ -140,7 +140,9 @@ int elcr_probe(void); enum intr_trigger elcr_read_trigger(u_int irq); void elcr_resume(void); void elcr_write_trigger(u_int irq, enum intr_trigger trigger); +#ifdef SMP void intr_add_cpu(u_int cpu); +#endif int intr_add_handler(const char *name, int vector, driver_filter_t filter, driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep); Index: sys/amd64/amd64/mp_machdep.c =================================================================== --- sys/amd64/amd64/mp_machdep.c (revisione 240210) +++ sys/amd64/amd64/mp_machdep.c (copia locale) @@ -784,6 +784,8 @@ init_secondary(void) * We tell the I/O APIC code about all the CPUs we want to receive * interrupts. If we don't want certain CPUs to receive IRQs we * can simply not tell the I/O APIC code about them in this function. + * We also do not tell it about the BSP since it tells itself about + * the BSP internally to work with UP kernels and on UP machines. */ static void set_interrupt_apic_ids(void) @@ -794,6 +796,8 @@ set_interrupt_apic_ids(void) apic_id = cpu_apic_ids[i]; if (apic_id == -1) continue; + if (cpu_info[apic_id].cpu_bsp) + continue; if (cpu_info[apic_id].cpu_disabled) continue; Index: sys/amd64/amd64/machdep.c =================================================================== --- sys/amd64/amd64/machdep.c (revisione 240210) +++ sys/amd64/amd64/machdep.c (copia locale) @@ -298,11 +298,6 @@ cpu_startup(dummy) vm_pager_bufferinit(); cpu_setregs(); - - /* - * Add BSP as an interrupt target. - */ - intr_add_cpu(0); } /* Index: sys/x86/x86/intr_machdep.c =================================================================== --- sys/x86/x86/intr_machdep.c (revisione 240210) +++ sys/x86/x86/intr_machdep.c (copia locale) @@ -452,7 +452,7 @@ DB_SHOW_COMMAND(irqs, db_show_irqs) * allocate CPUs round-robin. */ -static cpuset_t intr_cpus; +static cpuset_t intr_cpus = CPUSET_T_INITIALIZER(0x1); static int current_cpu; /* @@ -565,11 +565,4 @@ intr_next_cpu(void) return (PCPU_GET(apic_id)); } - -/* Use an empty stub for compatibility. */ -void -intr_add_cpu(u_int cpu __unused) -{ - -} #endif