Index: sys/sparc64/sparc64/machdep.c
===================================================================
--- sys/sparc64/sparc64/machdep.c	(revisione 234517)
+++ sys/sparc64/sparc64/machdep.c	(copia locale)
@@ -197,12 +197,10 @@ cpu_startup(void *arg)
 
 	cpu_identify(rdpr(ver), PCPU_GET(clock), curcpu);
 
-#ifdef SMP
 	/*
 	 * Add BSP as an interrupt target.
 	 */
 	intr_add_cpu(0);
-#endif
 }
 
 void
Index: sys/sparc64/sparc64/intr_machdep.c
===================================================================
--- sys/sparc64/sparc64/intr_machdep.c	(revisione 234517)
+++ sys/sparc64/sparc64/intr_machdep.c	(copia locale)
@@ -459,48 +459,6 @@ intr_describe(int vec, void *ih, const char *descr
 static cpuset_t intr_cpus;
 static int current_cpu;
 
-static void
-intr_assign_next_cpu(struct intr_vector *iv)
-{
-	struct pcpu *pc;
-
-	sx_assert(&intr_table_lock, SA_XLOCKED);
-
-	/*
-	 * Assign this source to a CPU in a round-robin fashion.
-	 */
-	pc = pcpu_find(current_cpu);
-	if (pc == NULL)
-		return;
-	iv->iv_mid = pc->pc_mid;
-	iv->iv_ic->ic_assign(iv);
-	do {
-		current_cpu++;
-		if (current_cpu > mp_maxid)
-			current_cpu = 0;
-	} while (!CPU_ISSET(current_cpu, &intr_cpus));
-}
-
-/* Attempt to bind the specified IRQ to the specified CPU. */
-int
-intr_bind(int vec, u_char cpu)
-{
-	struct intr_vector *iv;
-	int error;
-
-	if (vec < 0 || vec >= IV_MAX)
-		return (EINVAL);
-	sx_xlock(&intr_table_lock);
-	iv = &intr_vectors[vec];
-	if (iv == NULL) {
-		sx_xunlock(&intr_table_lock);
-		return (EINVAL);
-	}
-	error = intr_event_bind(iv->iv_event, cpu);
-	sx_xunlock(&intr_table_lock);
-	return (error);
-}
-
 /*
  * Add a CPU to our mask of valid CPUs that can be destinations of
  * interrupts.
@@ -555,3 +513,45 @@ intr_shuffle_irqs(void *arg __unused)
 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,
     NULL);
 #endif
+
+/* Attempt to bind the specified IRQ to the specified CPU. */
+int
+intr_bind(int vec, u_char cpu)
+{
+#ifdef SMP
+	struct intr_vector *iv;
+	int error;
+
+	if (vec < 0 || vec >= IV_MAX)
+		return (EINVAL);
+	sx_xlock(&intr_table_lock);
+	iv = &intr_vectors[vec];
+	if (iv == NULL) {
+		sx_xunlock(&intr_table_lock);
+		return (EINVAL);
+	}
+	error = intr_event_bind(iv->iv_event, cpu);
+	sx_xunlock(&intr_table_lock);
+	return (error);
+#else
+	return (EOPNOTSUPP);
+#endif
+}
+
+/*
+ * Add a CPU to our mask of valid CPUs that can be destinations of
+ * interrupts.
+ */
+void
+intr_add_cpu(u_int cpu)
+{
+
+#ifdef SMP
+	if (cpu >= MAXCPU)
+		panic("%s: Invalid CPU ID", __func__);
+	if (bootverbose)
+		printf("INTR: Adding CPU %d as a target\n", cpu);
+
+	CPU_SET(cpu, &intr_cpus);
+#endif
+}
Index: sys/sparc64/include/intr_machdep.h
===================================================================
--- sys/sparc64/include/intr_machdep.h	(revisione 234517)
+++ sys/sparc64/include/intr_machdep.h	(copia locale)
@@ -91,9 +91,7 @@ struct intr_vector {
 extern ih_func_t *intr_handlers[];
 extern struct intr_vector intr_vectors[];
 
-#ifdef SMP
 void	intr_add_cpu(u_int cpu);
-#endif
 int	intr_bind(int vec, u_char cpu);
 int	intr_describe(int vec, void *ih, const char *descr);
 void	intr_setup(int level, ih_func_t *ihf, int pri, iv_func_t *ivf,
Index: sys/i386/include/intr_machdep.h
===================================================================
--- sys/i386/include/intr_machdep.h	(revisione 234517)
+++ sys/i386/include/intr_machdep.h	(copia locale)
@@ -131,14 +131,10 @@ int	elcr_probe(void);
 enum intr_trigger elcr_read_trigger(u_int irq);
 void	elcr_resume(void);
 void	elcr_write_trigger(u_int irq, enum intr_trigger trigger);
-#ifdef SMP
 void	intr_add_cpu(u_int cpu);
-#endif
 int	intr_add_handler(const char *name, int vector, driver_filter_t filter,
     driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep);
-#ifdef SMP
 int	intr_bind(u_int vector, u_char cpu);
-#endif
 int	intr_config_intr(int vector, enum intr_trigger trig,
     enum intr_polarity pol);
 int	intr_describe(u_int vector, void *ih, const char *descr);
Index: sys/i386/i386/machdep.c
===================================================================
--- sys/i386/i386/machdep.c	(revisione 234517)
+++ sys/i386/i386/machdep.c	(copia locale)
@@ -337,12 +337,10 @@ cpu_startup(dummy)
 	cpu_setregs();
 #endif
 
-#ifdef SMP
 	/*
 	 * Add BSP as an interrupt target.
 	 */
 	intr_add_cpu(0);
-#endif
 }
 
 /*
Index: sys/amd64/include/intr_machdep.h
===================================================================
--- sys/amd64/include/intr_machdep.h	(revisione 234517)
+++ sys/amd64/include/intr_machdep.h	(copia locale)
@@ -140,15 +140,11 @@ int	elcr_probe(void);
 enum intr_trigger elcr_read_trigger(u_int irq);
 void	elcr_resume(void);
 void	elcr_write_trigger(u_int irq, enum intr_trigger trigger);
-#ifdef SMP
 void	intr_add_cpu(u_int cpu);
-#endif
 int	intr_add_handler(const char *name, int vector, driver_filter_t filter, 
 			 driver_intr_t handler, void *arg, enum intr_type flags, 
 			 void **cookiep);    
-#ifdef SMP
 int	intr_bind(u_int vector, u_char cpu);
-#endif
 int	intr_config_intr(int vector, enum intr_trigger trig,
     enum intr_polarity pol);
 int	intr_describe(u_int vector, void *ih, const char *descr);
Index: sys/amd64/amd64/machdep.c
===================================================================
--- sys/amd64/amd64/machdep.c	(revisione 234517)
+++ sys/amd64/amd64/machdep.c	(copia locale)
@@ -296,12 +296,10 @@ cpu_startup(dummy)
 
 	cpu_setregs();
 
-#ifdef SMP
 	/*
 	 * Add BSP as an interrupt target.
 	 */
 	intr_add_cpu(0);
-#endif
 }
 
 /*
Index: sys/x86/x86/intr_machdep.c
===================================================================
--- sys/x86/x86/intr_machdep.c	(revisione 234517)
+++ sys/x86/x86/intr_machdep.c	(copia locale)
@@ -565,4 +565,19 @@ intr_next_cpu(void)
 
 	return (PCPU_GET(apic_id));
 }
+
+/* Return EOPNOTSUPP in the UP case. */
+int
+intr_bind(u_int vector, u_char cpu)
+{
+
+	return (EOPNOTSUPP);
+}
+
+/* Use an empty stub for compatibility. */
+void
+intr_add_cpu(u_int cpu)
+{
+
+}
 #endif