Index: sys/dev/nfe/if_nfereg.h =================================================================== --- sys/dev/nfe/if_nfereg.h (revision 184104) +++ sys/dev/nfe/if_nfereg.h (working copy) @@ -51,7 +51,7 @@ #define NFE_MSI_MAP0 0x020 #define NFE_MSI_MAP1 0x024 #define NFE_MSI_IRQ_MASK 0x030 -#define NFE_MAC_RESET 0x03c +#define NFE_MAC_RESET 0x034 #define NFE_MISC1 0x080 #define NFE_TX_CTL 0x084 #define NFE_TX_STATUS 0x088 @@ -236,14 +236,22 @@ uint32_t physaddr; uint16_t length; uint16_t flags; -#define NFE_RX_FIXME_V1 0x6004 #define NFE_RX_VALID_V1 (1 << 0) #define NFE_TX_ERROR_V1 0x7808 #define NFE_TX_LASTFRAG_V1 (1 << 0) +#define NFE_RX_MISSFRAME_V1 (1<<1) +#define NFE_RX_SUBTRACT_V1 (1<<2) #define NFE_RX_ERROR1_V1 (1<<7) #define NFE_RX_ERROR2_V1 (1<<8) #define NFE_RX_ERROR3_V1 (1<<9) #define NFE_RX_ERROR4_V1 (1<<10) +#define NFE_RX_CRC_ERR_V1 (1<<11) +#define NFE_RX_OFLOW_ERR_V1 (1<<12) +#define NFE_RX_FRAME_ERR_V1 (1<<13) +#define NFE_RX_ERR_MASK_V1 \ + (NFE_RX_ERROR1_V1 | NFE_RX_ERROR2_V1 | NFE_RX_ERROR3_V1 | \ + NFE_RX_ERROR4_V1 | NFE_RX_CRC_ERR_V1 | NFE_RX_OFLOW_ERR_V1 | \ + NFE_RX_FRAME_ERR_V1) } __packed; #define NFE_V1_TXERR "\020" \ @@ -258,7 +266,6 @@ #define NFE_TX_VTAG (1 << 18) uint16_t length; uint16_t flags; -#define NFE_RX_FIXME_V2 0x4300 #define NFE_RX_VALID_V2 (1 << 13) #define NFE_TX_ERROR_V2 0x5c04 #define NFE_TX_LASTFRAG_V2 (1 << 13) @@ -266,6 +273,14 @@ #define NFE_RX_ERROR2_V2 (1<<3) #define NFE_RX_ERROR3_V2 (1<<4) #define NFE_RX_ERROR4_V2 (1<<5) +#define NFE_RX_CRC_ERR_V2 (1<<6) +#define NFE_RX_OFLOW_ERR_V2 (1<<7) +#define NFE_RX_FRAME_ERR_V2 (1<<8) +#define NFE_RX_SUBTRACT_V2 (1<<9) +#define NFE_RX_ERR_MASK_V2 \ + (NFE_RX_ERROR1_V2 | NFE_RX_ERROR2_V2 | NFE_RX_ERROR3_V2 | \ + NFE_RX_ERROR4_V2 | NFE_RX_CRC_ERR_V2 | NFE_RX_OFLOW_ERR_V2 | \ + NFE_RX_FRAME_ERR_V2) } __packed; #define NFE_V2_TXERR "\020" \ Index: sys/dev/nfe/if_nfereg.h =================================================================== --- sys/dev/nfe/if_nfereg.h (revision 184104) +++ sys/dev/nfe/if_nfereg.h (working copy) @@ -51,7 +51,7 @@ #define NFE_MSI_MAP0 0x020 #define NFE_MSI_MAP1 0x024 #define NFE_MSI_IRQ_MASK 0x030 -#define NFE_MAC_RESET 0x03c +#define NFE_MAC_RESET 0x034 #define NFE_MISC1 0x080 #define NFE_TX_CTL 0x084 #define NFE_TX_STATUS 0x088 @@ -236,14 +236,22 @@ uint32_t physaddr; uint16_t length; uint16_t flags; -#define NFE_RX_FIXME_V1 0x6004 #define NFE_RX_VALID_V1 (1 << 0) #define NFE_TX_ERROR_V1 0x7808 #define NFE_TX_LASTFRAG_V1 (1 << 0) +#define NFE_RX_MISSFRAME_V1 (1<<1) +#define NFE_RX_SUBTRACT_V1 (1<<2) #define NFE_RX_ERROR1_V1 (1<<7) #define NFE_RX_ERROR2_V1 (1<<8) #define NFE_RX_ERROR3_V1 (1<<9) #define NFE_RX_ERROR4_V1 (1<<10) +#define NFE_RX_CRC_ERR_V1 (1<<11) +#define NFE_RX_OFLOW_ERR_V1 (1<<12) +#define NFE_RX_FRAME_ERR_V1 (1<<13) +#define NFE_RX_ERR_MASK_V1 \ + (NFE_RX_ERROR1_V1 | NFE_RX_ERROR2_V1 | NFE_RX_ERROR3_V1 | \ + NFE_RX_ERROR4_V1 | NFE_RX_CRC_ERR_V1 | NFE_RX_OFLOW_ERR_V1 | \ + NFE_RX_FRAME_ERR_V1) } __packed; #define NFE_V1_TXERR "\020" \ @@ -258,7 +266,6 @@ #define NFE_TX_VTAG (1 << 18) uint16_t length; uint16_t flags; -#define NFE_RX_FIXME_V2 0x4300 #define NFE_RX_VALID_V2 (1 << 13) #define NFE_TX_ERROR_V2 0x5c04 #define NFE_TX_LASTFRAG_V2 (1 << 13) @@ -266,6 +273,14 @@ #define NFE_RX_ERROR2_V2 (1<<3) #define NFE_RX_ERROR3_V2 (1<<4) #define NFE_RX_ERROR4_V2 (1<<5) +#define NFE_RX_CRC_ERR_V2 (1<<6) +#define NFE_RX_OFLOW_ERR_V2 (1<<7) +#define NFE_RX_FRAME_ERR_V2 (1<<8) +#define NFE_RX_SUBTRACT_V2 (1<<9) +#define NFE_RX_ERR_MASK_V2 \ + (NFE_RX_ERROR1_V2 | NFE_RX_ERROR2_V2 | NFE_RX_ERROR3_V2 | \ + NFE_RX_ERROR4_V2 | NFE_RX_CRC_ERR_V2 | NFE_RX_OFLOW_ERR_V2 | \ + NFE_RX_FRAME_ERR_V2) } __packed; #define NFE_V2_TXERR "\020" \