/*- * Copyright (c) 2008 Wojciech A. Koszek * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /* LCDC LCD Controller Slave Interface - LCDC */ #define AP7002_LCDC_BEGIN 0xFF000000 #define AP7002_LCDC_END 0xFEFFFFFF /* DMACA DMA Controller Slave Interface- DMACA */ #define AP7002_DMACA_BEGIN 0xFF200000 #define AP7002_DMACA_END 0xFF1FFFFF /* USBA USB Slave Interface - USBA */ #define AP7002_USBA_BEGIN 0xFF300000 #define AP7002_USBA_END 0xFF2FFFFF /* SPI0 Serial Peripheral Interface - SPI0 */ #define AP7002_SPI0_BEGIN 0xFFE00000 #define AP7002_SPI0_END 0xFFDFFFFF /* SPI1 Serial Peripheral Interface - SPI1 */ #define AP7002_SPI1_BEGIN 0xFFE00400 #define AP7002_SPI1_END 0xFFE003FF /* TWI Two-wire Interface - TWI */ #define AP7002_TWI_BEGIN 0xFFE00800 #define AP7002_TWI_END 0xFFE007FF /* Universal Synchronous Asynchronous USART0 */ #define AP7002_USART0_BEGIN 0xFFE00C00 #define AP7002_USART0_END 0xFFE00BFF /* Universal Synchronous Asynchronous USART1 */ #define AP7002_USART1_BEGIN 0xFFE01000 #define AP7002_USART1_END 0xFFE00FFF /* Universal Synchronous Asynchronous USART2 */ #define AP7002_USART2_BEGIN 0xFFE01400 #define AP7002_USART2_END 0xFFE013FF /* Universal Synchronous Asynchronous USART3 */ #define AP7002_USART3_BEGIN 0xFFE01800 #define AP7002_USART3_END 0xFFE017FF /* SSC0 Synchronous Serial Controller - SSC0 */ #define AP7002_SSC0_BEGIN 0xFFE01C00 #define AP7002_SSC0_END 0xFFE01BFF /* SSC1 Synchronous Serial Controller - SSC1 */ #define AP7002_SSC1_BEGIN 0xFFE02000 #define AP7002_SSC1_END 0xFFE01FFF /* SSC2 Synchronous Serial Controller - SSC2 */ #define AP7002_SSC2_BEGIN 0xFFE02400 #define AP7002_SSC2_END 0xFFE023FF /* PIOA Parallel Input/Output 2 - PIOA */ #define AP7002_PIOA_BEGIN 0xFFE02800 #define AP7002_PIOA_END 0xFFE027FF /* PIOB Parallel Input/Output 2 - PIOB */ #define AP7002_PIOB_BEGIN 0xFFE02C00 #define AP7002_PIOB_END 0xFFE02BFF /* PIOC Parallel Input/Output 2 - PIOC */ #define AP7002_PIOC_BEGIN 0xFFE03000 #define AP7002_PIOC_END 0xFFE02FFF /* PIOD Parallel Input/Output 2 - PIOD */ #define AP7002_PIOD_BEGIN 0xFFE03400 #define AP7002_PIOD_END 0xFFE033FF /* PIOE Parallel Input/Output 2 - PIOE */ #define AP7002_PIOE_BEGIN 0xFFE03800 #define AP7002_PIOE_END 0xFFE037FF /* PSIF PS2 Interface - PSIF */ #define AP7002_PSIF_BEGIN 0xFFE03C00 #define AP7002_PSIF_END 0xFFE03BFF /* PM Power Manager - PM */ #define AP7002_PM_BEGIN 0xFFF00000 #define AP7002_PM_END 0xFFEFFFFF /* RTC Real Time Counter- RTC */ #define AP7002_RTC_BEGIN 0xFFF00080 #define AP7002_RTC_END 0xFFF0007F /* WDT WatchDog Timer- WDT */ #define AP7002_WDT_BEGIN 0xFFF000B0 #define AP7002_WDT_END 0xFFF000AF /* EIC External Interrupt Controller - EIC */ #define AP7002_EIC_BEGIN 0xFFF00100 #define AP7002_EIC_END 0xFFF000FF /* INTC Interrupt Controller - INTC */ #define AP7002_INTC_BEGIN 0xFFF00400 #define AP7002_INTC_END 0xFFF003FF /* HSB Matrix - HMATRIX */ #define AP7002_HSBM_BEGIN 0xFFF00800 #define AP7002_HSBM_END 0xFFF007FF /* TC0 Timer/Counter - TC0 */ #define AP7002_TC0_BEGIN 0xFFF00C00 #define AP7002_TC0_END 0xFFF00BFF /* TC1 Timer/Counter - TC1 */ #define AP7002_TC1_BEGIN 0xFFF01000 #define AP7002_TC1_END 0xFFF00FFF /* PWM Pulse Width Modulation Controller - PWM */ #define AP7002_PWM_BEGIN 0xFFF01400 #define AP7002_PWM_END 0xFFF013FF /* ABDAC Audio Bitstream DAC - ABDAC */ #define AP7002_ABDAC_BEGIN 0xFFF02000 #define AP7002_ABDAC_END 0xFFF01FFF /* MCI MultiMedia Card Interface - MCI */ #define AP7002_MCI_BEGIN 0xFFF02400 #define AP7002_MCI_END 0xFFF023FF /* AC97C AC97 Controller - AC97C */ #define AP7002_AC97C_BEGIN 0xFFF02800 #define AP7002_AC97C_END 0xFFF027FF /* ISI Image Sensor Interface - ISI */ #define AP7002_ISI_BEGIN 0xFFF02C00 #define AP7002_ISI_END 0xFFF02BFF /* USBA USB Configuration Interface - USBA */ #define AP7002_USBA_BEGIN 0xFFF03000 #define AP7002_USBA_END 0xFFF02FFF /* SMC Static Memory Controller - SMC */ #define AP7002_SMC_BEGIN 0xFFF03400 #define AP7002_SMC_END 0xFFF033FF /* SDRAMC Controller - SDRAMC */ #define AP7002_SDRAMC_BEGIN 0xFFF03800 #define AP7002_SDRAMC_END 0xFFF037FF /* ECC Error Correcting Code Controller - ECC */ #define AP7002_ECC_BEGIN 0xFFF03C00 #define AP7002_ECC_END 0xFFF03BFF