--- //depot/yahoo/ybsd_9/src/lib/libpmc/libpmc.c	2012-05-29 21:22:25.000000000 0000
+++ /home/seanbru/ybsd_9/lib/libpmc/libpmc.c	2012-05-29 21:22:25.000000000 0000
@@ -2611,7 +2611,11 @@
 			ev = corei7_event_table;
 			count = PMC_EVENT_TABLE_SIZE(corei7);
 			break;
+#ifdef notyet
+		case PMC_CPU_INTEL_IVYBRIDGE:
+#endif
 		case PMC_CPU_INTEL_SANDYBRIDGE:
+		case PMC_CPU_INTEL_SANDYBRIDGE_E:
 			ev = sandybridge_event_table;
 			count = PMC_EVENT_TABLE_SIZE(sandybridge);
 			break;
@@ -2637,6 +2641,7 @@
 			count = PMC_EVENT_TABLE_SIZE(corei7uc);
 			break;
 		case PMC_CPU_INTEL_SANDYBRIDGE:
+		case PMC_CPU_INTEL_SANDYBRIDGE_E:
 			ev = sandybridgeuc_event_table;
 			count = PMC_EVENT_TABLE_SIZE(sandybridgeuc);
 			break;
@@ -2900,6 +2905,7 @@
 		PMC_MDEP_INIT_INTEL_V2(corei7);
 		break;
 	case PMC_CPU_INTEL_SANDYBRIDGE:
+	case PMC_CPU_INTEL_SANDYBRIDGE_E:
 		pmc_class_table[n++] = &ucf_class_table_descr;
 		pmc_class_table[n++] = &sandybridgeuc_class_table_descr;
 		PMC_MDEP_INIT_INTEL_V2(sandybridge);
@@ -3031,6 +3037,7 @@
 			evfence = corei7_event_table + PMC_EVENT_TABLE_SIZE(corei7);
 			break;
 		case PMC_CPU_INTEL_SANDYBRIDGE:
+		case PMC_CPU_INTEL_SANDYBRIDGE_E:
 			ev = sandybridge_event_table;
 			evfence = sandybridge_event_table + PMC_EVENT_TABLE_SIZE(sandybridge);
 			break;
@@ -3051,6 +3058,7 @@
 			evfence = corei7uc_event_table + PMC_EVENT_TABLE_SIZE(corei7uc);
 			break;
 		case PMC_CPU_INTEL_SANDYBRIDGE:
+		case PMC_CPU_INTEL_SANDYBRIDGE_E:
 			ev = sandybridgeuc_event_table;
 			evfence = sandybridgeuc_event_table + PMC_EVENT_TABLE_SIZE(sandybridgeuc);
 			break;
--- //depot/yahoo/ybsd_9/src/sys/dev/hwpmc/hwpmc_core.c	2012-05-29 21:22:25.000000000 0000
+++ /home/seanbru/ybsd_9/sys/dev/hwpmc/hwpmc_core.c	2012-05-29 21:22:25.000000000 0000
@@ -1773,6 +1773,14 @@
 		if (iap_event_sandybridge_ok_on_counter(ev, ri) == 0)
 			return (EINVAL);
 		break;
+	case PMC_CPU_INTEL_SANDYBRIDGE_E:
+		if (iap_event_sandybridge_ok_on_counter(ev, ri) == 0)
+			return (EINVAL);
+		break;
+	case PMC_CPU_INTEL_IVYBRIDGE:
+		if (iap_event_sandybridge_ok_on_counter(ev, ri) == 0)
+			return (EINVAL);
+		break;
 	case PMC_CPU_INTEL_WESTMERE:
 		if (iap_event_westmere_ok_on_counter(ev, ri) == 0)
 			return (EINVAL);
@@ -1804,9 +1812,15 @@
 	case PMC_CPU_INTEL_COREI7:
 		cpuflag = IAP_F_I7;
 		break;
+	case PMC_CPU_INTEL_IVYBRIDGE:	
+		cpuflag = IAP_F_SB;
+		break;
 	case PMC_CPU_INTEL_SANDYBRIDGE:	
 		cpuflag = IAP_F_SB;
 		break;
+	case PMC_CPU_INTEL_SANDYBRIDGE_E:	
+		cpuflag = IAP_F_SB;
+		break;
 	case PMC_CPU_INTEL_WESTMERE:
 		cpuflag = IAP_F_WM;
 		break;
@@ -1894,7 +1908,9 @@
 	 * Only Atom and SandyBridge CPUs support the 'ANY' qualifier.
 	 */
 	if (core_cputype == PMC_CPU_INTEL_ATOM ||
-		core_cputype == PMC_CPU_INTEL_SANDYBRIDGE)
+		core_cputype == PMC_CPU_INTEL_SANDYBRIDGE ||
+		core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_E ||
+		core_cputype == PMC_CPU_INTEL_IVYBRIDGE)
 		evsel |= (config & IAP_ANY);
 	else if (config & IAP_ANY)
 		return (EINVAL);
--- //depot/yahoo/ybsd_9/src/sys/dev/hwpmc/hwpmc_intel.c	2012-07-19 20:38:11.000000000 0000
+++ /home/seanbru/ybsd_9/sys/dev/hwpmc/hwpmc_intel.c	2012-07-19 20:38:11.000000000 0000
@@ -146,6 +146,16 @@
 			cputype = PMC_CPU_INTEL_SANDYBRIDGE;
 			nclasses = 5;
 			break;
+		case 0x2D:	/* Per Intel document 253669-039US 05/2011. */
+			cputype = PMC_CPU_INTEL_SANDYBRIDGE_E;
+			nclasses = 5;
+			break;
+#ifdef notyet
+		case 0x3A:	/* Per Intel document 253669-039US 05/2011. */
+			cputype = PMC_CPU_INTEL_IVYBRIDGE;
+			nclasses = 5;
+			break;
+#endif
 		}
 		break;
 #if	defined(__i386__) || defined(__amd64__)
@@ -184,7 +194,9 @@
 	case PMC_CPU_INTEL_CORE2:
 	case PMC_CPU_INTEL_CORE2EXTREME:
 	case PMC_CPU_INTEL_COREI7:
+	case PMC_CPU_INTEL_IVYBRIDGE:
 	case PMC_CPU_INTEL_SANDYBRIDGE:
+	case PMC_CPU_INTEL_SANDYBRIDGE_E:
 	case PMC_CPU_INTEL_WESTMERE:
 		error = pmc_core_initialize(pmc_mdep, ncpus);
 		break;
@@ -233,7 +245,9 @@
 		 * Intel Corei7 and Westmere processors.
 		 */
 	case PMC_CPU_INTEL_COREI7:
+	case PMC_CPU_INTEL_IVYBRIDGE:
 	case PMC_CPU_INTEL_SANDYBRIDGE:
+	case PMC_CPU_INTEL_SANDYBRIDGE_E:
 	case PMC_CPU_INTEL_WESTMERE:
 		error = pmc_uncore_initialize(pmc_mdep, ncpus);
 		break;
@@ -263,7 +277,9 @@
 	case PMC_CPU_INTEL_CORE2:
 	case PMC_CPU_INTEL_CORE2EXTREME:
 	case PMC_CPU_INTEL_COREI7:
+	case PMC_CPU_INTEL_IVYBRIDGE:
 	case PMC_CPU_INTEL_SANDYBRIDGE:
+	case PMC_CPU_INTEL_SANDYBRIDGE_E:
 	case PMC_CPU_INTEL_WESTMERE:
 		pmc_core_finalize(md);
 		break;
@@ -294,7 +310,9 @@
 #if	defined(__i386__) || defined(__amd64__)
 	switch (md->pmd_cputype) {
 	case PMC_CPU_INTEL_COREI7:
+	case PMC_CPU_INTEL_IVYBRIDGE:
 	case PMC_CPU_INTEL_SANDYBRIDGE:
+	case PMC_CPU_INTEL_SANDYBRIDGE_E:
 	case PMC_CPU_INTEL_WESTMERE:
 		pmc_uncore_finalize(md);
 		break;
--- //depot/yahoo/ybsd_9/src/sys/dev/hwpmc/pmc_events.h	2012-05-29 21:22:25.000000000 0000
+++ /home/seanbru/ybsd_9/sys/dev/hwpmc/pmc_events.h	2012-05-29 21:22:25.000000000 0000
--- //depot/yahoo/ybsd_9/src/sys/sys/pmc.h	2012-05-29 21:22:25.000000000 0000
+++ /home/seanbru/ybsd_9/sys/sys/pmc.h	2012-05-29 21:22:25.000000000 0000
@@ -85,8 +85,10 @@
 	__PMC_CPU(INTEL_CORE2EXTREME,	0x89,	"Intel Core2 Extreme")	\
 	__PMC_CPU(INTEL_ATOM,	0x8A,	"Intel Atom")		\
 	__PMC_CPU(INTEL_COREI7, 0x8B,   "Intel Core i7")	\
-	__PMC_CPU(INTEL_WESTMERE, 0x8C,   "Intel Westmere")	\
-	__PMC_CPU(INTEL_SANDYBRIDGE, 0x8D,   "Intel Sandy Bridge")	\
+	__PMC_CPU(INTEL_WESTMERE, 0x8C,  "Intel Westmere")	\
+	__PMC_CPU(INTEL_SANDYBRIDGE, 0x8D,"Intel Sandy Bridge")	\
+	__PMC_CPU(INTEL_SANDYBRIDGE_E, 0x8E,   "Intel Sandy Bridge E")	\
+	__PMC_CPU(INTEL_IVYBRIDGE, 0x8F,   "Intel Ivy Bridge")	\
 	__PMC_CPU(INTEL_XSCALE,	0x100,	"Intel XScale")		\
 	__PMC_CPU(MIPS_24K,     0x200,  "MIPS 24K")		\
 	__PMC_CPU(PPC_7450,     0x300,  "PowerPC MPC7450")	\