Index: opcodes/i386-dis.c =================================================================== --- opcodes/i386-dis.c (revision 238077) +++ opcodes/i386-dis.c (working copy) @@ -93,6 +93,7 @@ static void OP_SIMD_Suffix (int, int); static void SIMD_Fixup (int, int); static void PNI_Fixup (int, int); +static void XCR_Fixup (int, int); static void SVME_Fixup (int, int); static void INVLPG_Fixup (int, int); static void BadOp (void); @@ -1693,7 +1694,7 @@ { { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } }, { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } }, - { "lgdt{Q|Q||}", { M } }, + { "lgdt{Q|Q||}", { { XCR_Fixup, 0 } } }, { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } }, { "smswD", { Sv } }, { "(bad)", { XX } }, @@ -1783,9 +1784,9 @@ { "fxrstor", { Ev } }, { "ldmxcsr", { Ev } }, { "stmxcsr", { Ev } }, - { "(bad)", { XX } }, - { "lfence", { { OP_0fae, 0 } } }, - { "mfence", { { OP_0fae, 0 } } }, + { "xsave", { Ev } }, + { "xrstor", { { OP_0fae, v_mode } } }, + { "xsaveopt", { { OP_0fae, v_mode } } }, { "clflush", { { OP_0fae, 0 } } }, }, /* GRP16 */ @@ -5905,18 +5906,19 @@ { if (modrm.reg == 7) strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence"); + else if (modrm.reg == 6) + strcpy (obuf + strlen (obuf) - sizeof ("xsaveopt") + 1, "mfence"); + else if (modrm.reg == 5) + strcpy (obuf + strlen (obuf) - sizeof ("xrstor") + 1, "lfence"); if (modrm.reg < 5 || modrm.rm != 0) { BadOp (); /* bad sfence, mfence, or lfence */ return; } + /* XXX */ + sizeflag = 0; } - else if (modrm.reg != 7) - { - BadOp (); /* bad clflush */ - return; - } OP_E (bytemode, sizeflag); } @@ -6170,6 +6172,43 @@ } static void +XCR_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) +{ + if (modrm.mod == 3 && modrm.reg == 2 && modrm.rm <= 1) + { + /* Override "lgdt". */ + size_t olen = strlen (obuf); + char *p = obuf + olen - 4; + + /* We might have a suffix when disassembling with -Msuffix. */ + if (*p == 'i') + --p; + + /* Remove "addr16/addr32" if we aren't in Intel mode. */ + if (!intel_syntax + && (prefixes & PREFIX_ADDR) + && olen >= (4 + 7) + && *(p - 1) == ' ' + && CONST_STRNEQ (p - 7, "addr") + && (CONST_STRNEQ (p - 3, "16") + || CONST_STRNEQ (p - 3, "32"))) + p -= 7; + + if (modrm.rm) + { + strcpy (p, "xsetbv"); + } + else + { + strcpy (p, "xgetbv"); + } + + codep++; + } + else + OP_M (0, sizeflag); +} +static void SVME_Fixup (int bytemode, int sizeflag) { const char *alt; Index: opcodes/i386-opc.tbl =================================================================== --- opcodes/i386-opc.tbl (revision 238077) +++ opcodes/i386-opc.tbl (working copy) @@ -1487,3 +1487,10 @@ xcryptofb, 0, 0xf30fa7, 0xe8, Cpu686|CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|IsString|ImmExt, { 0 } // Alias for xstore-rng. xstore, 0, 0xfa7, 0xc0, Cpu686|CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|IsString|ImmExt, { 0 } + +// XSAVE/XRSTOR related instructions +xgetbv, 0, 0xf01, 0xd0, CpuSSE3, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 } +xsetbv, 0, 0xf01, 0xd1, CpuSSE3, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 } +xsave, 1, 0xfae, 0x4, Cpu686, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S } +xsaveopt, 1, 0xfae, 0x6, Cpu686, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S } +xrstor, 1, 0xfae, 0x5, Cpu686, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S } Index: opcodes/i386-tbl.h =================================================================== --- opcodes/i386-tbl.h (revision 238077) +++ opcodes/i386-tbl.h (working copy) @@ -4288,6 +4288,21 @@ { "xstore", 0, 0xfa7, 0xc0, Cpu686|CpuPadLock, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|IsString|ImmExt, { 0 } }, + { "xgetbv", 0, 0xf01, 0xd0, CpuSSE3, + No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, + { 0 } }, + { "xsetbv", 0, 0xf01, 0xd1, CpuSSE3, + No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, + { 0 } }, + { "xsave", 1, 0xfae, 0x4, CpuSSE3, + Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, + { BaseIndex|Disp8|Disp16|Disp32|Disp32S } }, + { "xsaveopt", 1, 0xfae, 0x6, CpuSSE3, + Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, + { BaseIndex|Disp8|Disp16|Disp32|Disp32S } }, + { "xrstor", 1, 0xfae, 0x5, CpuSSE3, + Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, + { BaseIndex|Disp8|Disp16|Disp32|Disp32S } }, { NULL, 0, 0, 0, 0, 0, { 0 } } };