diff -uprN -x CVS -I \$FreeBSD pci/pci.c /home/john/work/p4/msi/dev/pci/pci.c --- pci/pci.c Sat Dec 16 09:17:12 2006 +++ /home/john/work/p4/msi/dev/pci/pci.c Fri Dec 15 15:59:15 2006 @@ -178,11 +178,17 @@ struct pci_quirk pci_quirks[] = { { 0x02001166, PCI_QUIRK_MAP_REG, 0x90, 0 }, /* * MSI doesn't work with the Intel E7501 chipset, at least on * the Tyan 2721 motherboard. */ { 0x254c8086, PCI_QUIRK_DISABLE_MSI, 0, 0 }, + /* + * MSI doesn't work with devices behind the AMD 8131 HT-PCIX + * bridge. + */ + { 0x74501022, PCI_QUIRK_DISABLE_MSI, 0, 0 }, + { 0 } }; diff -uprN -x CVS -I \$FreeBSD pci/pci_pci.c /home/john/work/p4/msi/dev/pci/pci_pci.c --- pci/pci_pci.c Sat Dec 16 09:17:12 2006 +++ /home/john/work/p4/msi/dev/pci/pci_pci.c Fri Dec 15 15:59:15 2006 @@ -240,6 +240,9 @@ pcib_attach_common(device_t dev) } } + if (pci_msi_device_blacklisted(dev)) + sc->flags |= PCIB_DISABLE_MSI; + /* * Intel 815, 845 and other chipsets say they are PCI-PCI bridges, * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM, @@ -547,8 +550,11 @@ pcib_route_interrupt(device_t pcib, devi int pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs) { + struct pcib_softc *sc = device_get_softc(dev); device_t bus; + if (sc->flags & PCIB_DISABLE_MSI) + return (ENXIO); bus = device_get_parent(pcib); return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, irqs)); @@ -568,8 +574,11 @@ pcib_release_msi(device_t pcib, device_t int pcib_alloc_msix(device_t pcib, device_t dev, int index, int *irq) { + struct pcib_softc *sc = device_get_softc(dev); device_t bus; + if (sc->flags & PCIB_DISABLE_MSI) + return (ENXIO); bus = device_get_parent(pcib); return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, index, irq)); } diff -uprN -x CVS -I \$FreeBSD pci/pcib_private.h /home/john/work/p4/msi/dev/pci/pcib_private.h --- pci/pcib_private.h Sat Dec 16 09:17:12 2006 +++ /home/john/work/p4/msi/dev/pci/pcib_private.h Fri Dec 15 15:59:15 2006 @@ -46,6 +46,7 @@ struct pcib_softc device_t dev; uint32_t flags; /* flags */ #define PCIB_SUBTRACTIVE 0x1 +#define PCIB_DISABLE_MSI 0x2 uint16_t command; /* command register */ uint8_t secbus; /* secondary bus number */ uint8_t subbus; /* subordinate bus number */