--- sys/dev/ata/ata-chipset.c.orig 2007-11-27 03:08:08.000000000 +0800 +++ sys/dev/ata/ata-chipset.c 2007-11-30 22:48:52.000000000 +0800 @@ -1345,8 +1345,14 @@ { ATA_ATI_IXP400, 0x00, 0, 0, ATA_UDMA6, "IXP400" }, { ATA_ATI_IXP400_S1, 0x00, SIIMEMIO, 0, ATA_SA150, "IXP400" }, { ATA_ATI_IXP400_S2, 0x00, SIIMEMIO, 0, ATA_SA150, "IXP400" }, - { ATA_ATI_IXP600, 0x00, 0, 0, ATA_UDMA6, "IXP600" }, - { ATA_ATI_IXP700, 0x00, 0, 0, ATA_UDMA6, "IXP700" }, + { ATA_ATI_SB600, 0x00, 0, 0, ATA_UDMA6, "SB600" }, + { ATA_ATI_SB600_S1, 0x00, 0, AHCI, ATA_SA300, "SB600" }, + { ATA_ATI_SB700, 0x00, 0, 0, ATA_UDMA6, "SB700" }, + { ATA_ATI_SB700_S1, 0x00, 0, AHCI, ATA_SA300, "SB700" }, + { ATA_ATI_SB700_S2, 0x00, 0, AHCI, ATA_SA300, "SB700" }, + { ATA_ATI_SB700_S3, 0x00, 0, AHCI, ATA_SA300, "SB700" }, + { ATA_ATI_SB700_S4, 0x00, 0, AHCI, ATA_SA300, "SB700" }, + { ATA_ATI_SB800_S1, 0x00, 0, AHCI, ATA_SA300, "SB800" }, { 0, 0, 0, 0, 0, 0}}; if (!(ctlr->chip = ata_match_chip(dev, ids))) @@ -1370,11 +1376,22 @@ if (ata_setup_interrupt(dev)) return ENXIO; - /* IXP600 & IXP700 only have 1 PATA channel */ - if ((ctlr->chip->chipid == ATA_ATI_IXP600) || - (ctlr->chip->chipid == ATA_ATI_IXP700)) + /* SB600 & SB700 only have 1 PATA channel */ + if ((ctlr->chip->chipid == ATA_ATI_SB600) || + (ctlr->chip->chipid == ATA_ATI_SB700)) ctlr->channels = 1; + if (ctlr->chip->cfg2 == AHCI) { + ctlr->r_rid2 = PCIR_BAR(5); + ctlr->r_type2 = SYS_RES_MEMORY; + ctlr->r_res2 = bus_alloc_resource_any(dev, + ctlr->r_type2, &ctlr->r_rid2, RF_ACTIVE); + if (ctlr->r_res2 != NULL) + return ata_ahci_chipinit(dev); + else + return ENXIO; + } + ctlr->setmode = ata_ati_setmode; return 0; } @@ -3008,6 +3025,13 @@ { ATA_NFORCE_MCP61_S3, 0, 0, NV4|NVQ, ATA_SA300, "nForce MCP61" }, { ATA_NFORCE_MCP65, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nForce MCP65" }, { ATA_NFORCE_MCP67, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nForce MCP67" }, + { ATA_NFORCE_MCP67_S1, 0, 0, AHCI, ATA_SA300, "nForce MCP67" }, + { ATA_NFORCE_MCP67_S2, 0, 0, AHCI, ATA_SA300, "nForce MCP67" }, + { ATA_NFORCE_MCP67_S3, 0, 0, AHCI, ATA_SA300, "nForce MCP67" }, + { ATA_NFORCE_MCP67_S4, 0, 0, AHCI, ATA_SA300, "nForce MCP67" }, + { ATA_NFORCE_MCP68, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nForce MCP68" }, + { ATA_NFORCE_MCP68_S1, 0, 0, AHCI, ATA_SA300, "nForce MCP68" }, + { ATA_NFORCE_MCP68_S2, 0, 0, AHCI, ATA_SA300, "nForce MCP68" }, { ATA_NFORCE_MCP73, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nForce MCP73" }, { ATA_NFORCE_MCP77, 0, AMDNVIDIA, NVIDIA, ATA_UDMA6, "nForce MCP77" }, { 0, 0, 0, 0, 0, 0}} ; @@ -3038,6 +3062,9 @@ &ctlr->r_rid2, RF_ACTIVE))) { int offset = ctlr->chip->cfg2 & NV4 ? 0x0440 : 0x0010; + if (ctlr->chip->cfg2 == AHCI) + return ata_ahci_chipinit(dev); + ctlr->allocate = ata_nvidia_allocate; ctlr->reset = ata_nvidia_reset; --- sys/dev/ata/ata-pci.h.orig 2007-11-18 22:44:52.000000000 +0800 +++ sys/dev/ata/ata-pci.h 2007-11-30 22:47:46.000000000 +0800 @@ -103,8 +103,14 @@ #define ATA_ATI_IXP400 0x43761002 #define ATA_ATI_IXP400_S1 0x43791002 #define ATA_ATI_IXP400_S2 0x437a1002 -#define ATA_ATI_IXP600 0x438c1002 -#define ATA_ATI_IXP700 0x439c1002 +#define ATA_ATI_SB600 0x438c1002 +#define ATA_ATI_SB600_S1 0x43801002 +#define ATA_ATI_SB700 0x439c1002 +#define ATA_ATI_SB700_S1 0x43901002 +#define ATA_ATI_SB700_S2 0x43911002 +#define ATA_ATI_SB700_S3 0x43921002 +#define ATA_ATI_SB700_S4 0x43941002 +#define ATA_ATI_SB800_S1 0x43951002 #define ATA_CENATEK_ID 0x16ca #define ATA_CENATEK_ROCKET 0x000116ca @@ -236,6 +242,13 @@ #define ATA_NFORCE_MCP61_S3 0x03f710de #define ATA_NFORCE_MCP65 0x044810de #define ATA_NFORCE_MCP67 0x056010de +#define ATA_NFORCE_MCP67_S1 0x055010de +#define ATA_NFORCE_MCP67_S2 0x055110de +#define ATA_NFORCE_MCP67_S3 0x055210de +#define ATA_NFORCE_MCP67_S4 0x055310de +#define ATA_NFORCE_MCP68 0x056010de +#define ATA_NFORCE_MCP68_S1 0x055410de +#define ATA_NFORCE_MCP68_S2 0x058410de #define ATA_NFORCE_MCP73 0x056c10de #define ATA_NFORCE_MCP77 0x075910de