Index: include/frame.h =================================================================== --- include/frame.h (revision 253579) +++ include/frame.h (working copy) @@ -62,7 +62,7 @@ typedef struct trapframe { register_t tf_spsr; /* Zero on arm26 */ register_t tf_r0; - register_t tf_r1; + register_t tf_r1; register_t tf_r2; register_t tf_r3; register_t tf_r4; @@ -78,7 +78,8 @@ register_t tf_usr_lr; register_t tf_svc_sp; /* Not used on arm26 */ register_t tf_svc_lr; /* Not used on arm26 */ - register_t tf_pc; + register_t tf_pc; + register_t tf_pad; } trapframe_t; /* Register numbers */ Index: include/asmacros.h =================================================================== --- include/asmacros.h (revision 253579) +++ include/asmacros.h (working copy) @@ -133,6 +133,7 @@ orr r2, r2, #(PSR_SVC32_MODE); \ msr cpsr_c, r2; /* Punch into SVC mode */ \ mov r2, sp; /* Save SVC sp */ \ + sub sp, sp, #4; /* Align the stack */ \ str r0, [sp, #-4]!; /* Push return address */ \ str lr, [sp, #-4]!; /* Push SVC lr */ \ str r2, [sp, #-4]!; /* Push SVC sp */ \ @@ -168,6 +169,7 @@ orr r2, r2, #(PSR_SVC32_MODE); \ msr cpsr_c, r2; /* Punch into SVC mode */ \ mov r2, sp; /* Save SVC sp */ \ + sub sp, sp, #4; /* Align the stack */ \ str r0, [sp, #-4]!; /* Push return address */ \ str lr, [sp, #-4]!; /* Push SVC lr */ \ str r2, [sp, #-4]!; /* Push SVC sp */ \ @@ -209,6 +211,7 @@ #endif #if defined(__ARM_EABI__) #define UNWINDSVCFRAME \ + .pad #(4); /* Skip stack alignment */ \ .save {r13-r15}; /* Restore sp, lr, pc */ \ .pad #(2*4); /* Skip user sp and lr */ \ .save {r0-r12}; /* Restore r0-r12 */ \ Index: arm/vm_machdep.c =================================================================== --- arm/vm_machdep.c (revision 253579) +++ arm/vm_machdep.c (working copy) @@ -77,7 +77,7 @@ * struct switchframe must be a multiple of 8 for correct stack alignment */ CTASSERT(sizeof(struct switchframe) == 24); -CTASSERT(sizeof(struct trapframe) == 76); +CTASSERT(sizeof(struct trapframe) == 80); #ifndef NSFBUFS #define NSFBUFS (512 + maxusers * 16)