Index: contrib/bind9/lib/isc/arm/include/isc/atomic.h
===================================================================
--- contrib/bind9/lib/isc/arm/include/isc/atomic.h	(revision 245093)
+++ contrib/bind9/lib/isc/arm/include/isc/atomic.h	(working copy)
@@ -46,32 +46,56 @@
 	atomic_store_rel_int(p, val);
 }
 
+/*
+ * This routine atomically replaces the value in 'p' with 'val', if the
+ * original value is equal to 'cmpval'.  The original value is returned in any
+ * case.
+ */
 static inline isc_int32_t
 isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val)
 {
-	register int done, ras_start;
+	register int done;
 
+#if defined (__ARM_ARCH_7__) || \
+	defined (__ARM_ARCH_7A__) || \
+	defined (__ARM_ARCH_6__) || \
+	defined (__ARM_ARCH_6J__) || \
+	defined (__ARM_ARCH_6K__) || \
+	defined (__ARM_ARCH_6Z__) || \
+	defined (__ARM_ARCH_6ZK__)
+	register int tmp;
+
 	__asm __volatile("1:\n"
+	    "ldrex	%0, [%1]\n"
+	    "cmp	%0, %2\n"
+	    "bne	2f\n"
+	    "strex	%4, %3, [%1]\n"
+	    "cmp	%4, #0\n"
+	    "bne	1b\n"
+	    "2:\n"
+	    : "=&r" (done), "+r" (p), "+r" (cmpval), "+r" (val), "+r" (tmp)
+	    : : "cc", "memory");
+#else
+	register int ras_start = ARM_RAS_START;
+
+	__asm __volatile("1:\n"
 	    "adr	%1, 1b\n"
-	    "mov	%0, #0xe0000004\n"
 	    "str	%1, [%0]\n"
-	    "mov	%0, #0xe0000008\n"
 	    "adr	%1, 2f\n"
-	    "str	%1, [%0]\n"
+	    "str	%1, [%0, #4]\n"
 	    "ldr	%1, [%2]\n"
 	    "cmp	%1, %3\n"
 	    "streq	%4, [%2]\n"
 	    "2:\n"
 	    "mov	%3, #0\n"
-	    "mov	%0, #0xe0000004\n"
 	    "str	%3, [%0]\n"
 	    "mov	%3, #0xffffffff\n"
-	    "mov	%0, #0xe0000008\n"
-	    "str	%3, [%0]\n"
-	    : "=r" (ras_start), "=r" (done)
-	    ,"+r" (p), "+r" (cmpval), "+r" (val) : : "memory");
+	    "str	%3, [%0, #4]\n"
+	    : "+r" (ras_start), "=r" (done)
+	    ,"+r" (p), "+r" (cmpval), "+r" (val) : : "cc", "memory");
+#endif
+
 	return (done);
-
 }
 #else /* !FreeBSD */